MM74HC132MX Fairchild Semiconductor, MM74HC132MX Datasheet
MM74HC132MX
Specifications of MM74HC132MX
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MM74HC132MX Summary of contents
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... All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View ©1983 Fairchild Semiconductor Corporation MM74HC132 Rev. 1.3.0 General Description The MM74HC132 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads ...
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... Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol V Supply Voltage Input or Output Voltage IN OUT T Operating Temperature Range A ©1983 Fairchild Semiconductor Corporation MM74HC132 Rev. 1.3.0 (1) Parameter Parameter 2 Rating –0.5 to +7.0V –1 +1.5V CC –0 +0.5V CC ± ...
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... For a power supply of 5V ±10% the worst case output voltages (V values should be used when designing with this supply. Worst case V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage current (I IH the higher voltage and so the 6.0V values should be used. ©1983 Fairchild Semiconductor Corporation MM74HC132 Rev. 1.3.0 ( ...
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... Maximum Output TLH THL Rise and Fall Time C Power Dissipation PD (4) Capacitance C Maximum Input IN Capacitance Note determines the no load dynamic power consumption current consumption ©1983 Fairchild Semiconductor Corporation MM74HC132 Rev. 1.3.0 t 6ns r f Conditions t 6ns (unless otherwise specified (V) Conditions Typ. CC 2 ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...