hy5ps1g831lf Hynix Semiconductor, hy5ps1g831lf Datasheet - Page 17

• Manufacturer Part Number: hy5ps1g831lf
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 1.2 / Dec 2006
For purposes of IDD testing, the following parameters are to be utilized
Detailed IDD7
The detailed timings are shown below for IDD7. Changes will be required if timing parameter changes are made to the specification.
Legend: A = Active; RA = Read with Autoprecharge; D = Deselect
IDD7: Operating Current: All Bank Interleave Read operation
All banks are being interleaved at minimum t RC(IDD) without violating t RRD(IDD) using a burst length of 4. Control and address bus
inputs are STABLE during DESELECTs. IOUT = 0mA
Timing Patterns for 4 bank devices x4/ x8/ x16
-DDR2-400 4/4/4: A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D D D D
-DDR2-400 3/3/3: A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D D D
-DDR2-533 5/4/4: A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D D D
-DDR2-533 4/4/4: A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D D D
Timing Patterns for 8 bank devices x4/8
-DDR2-400 all bins: A0 RA0 A1 RA1 A2 RA2 A3 RA3 A4 RA4 A5 RA5 A6 RA6 A7 RA7
-DDR2-533 all bins: A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D A4 RA4 A5 RA5 A6 RA6 A7 RA7 D D
Timing Patterns for 8 bank devices x16
-DDR2-400 all bins: A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D A4 RA4 A5 RA5 A6 RA6 A7 RA7 D D
-DDR2-533 all bins: A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D A4 RA4 D A5 D A6 RA6 D A7 RA7 D D D
t RFC(IDD)-256Mb
t RFC(IDD)-512Mb
t RRD(IDD)-x4/x8
t RFC(IDD)-1Gb
t RFC(IDD)-2Gb
t RRD(IDD)-x16
t RASmax(IDD)
t RASmin(IDD)
Parameter
t RCD(IDD)
t RC(IDD)
t CK(IDD)
t RP(IDD)
CL(IDD)
DDR2-667
70000
127.5
197.5
5-5-5
105
7.5
15
60
45
15
75
5
9
3
DDR2-533
70000
127.5
197.5
4-4-4
3.75
105
7.5
15
60
10
45
15
75
4
DDR2-400
70000
127.5
197.5
3-3-3
1HY5PS1G431(L)F
1HY5PS1G831(L)F
105
7.5
15
55
10
40
15
75
3
5
Units
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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