hd66731a01tb0l Renesas Electronics Corporation., hd66731a01tb0l Datasheet - Page 12

• Manufacturer Part Number: hd66731a01tb0l
• Description: Dot-matrix Liquid Crystal Display Controller/driver Supporting Japanese Kanji, Korean Font Display - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

HD66730/HD66731
Pin Function (HD66730)
Table 1
Signal
RESET*
IM
RS/CS*
RW/SID
E/SCLK
DB1 to DB7
DB0/ SOD
SEG1 to
SEG71
COMS
COM1 to
COM24
COM25/
COMD
12
Pin Functional Description
Number
of Pins
1
1
1
1
7
1
71
1
24
1
1
I/O
I
I
I
I
I
I/O
I/O /O MPU
O
O
O
O
Device
Interfaced with
—
—
MPU
MPU
MPU
MPU
LCD
LCD
LCD
LCD/
extension driver
Function
Acts as a reset input pin. The LSI is initialized during
low level. Refer to Reset Function.
Must be reset after power-on.
Selects interface mode with the MPU;
Low: Serial mode
High: 8-bit bus mode
Selects registers during bus mode:
Low: Index register (write);
High: Control register (write);
Acts as chip-select during serial mode:
Low: Select (access enable)
High: Not selected (access disable)
Selects read/write during bus mode;
Low: Write
High: Read
Inputs serial data during serial mode.
Starts data read/write during bus mode;
Inputs (Receives) serial clock during serial mode.
Seven high-order bidirectional tristate data bus pins.
Used for data transfer between the MPU and the
HD66730. DB7 can be used as a busy flag. Open these
pins during serial mode since these signals are not
used.
The lowest bidirectional data bit (DB0) during bus
mode. Outputs (transmits) serial data during serial
mode. Open this pin if reading (transmission) is not
performed.
Display data output signals for the segment extension
driver.
Acts as a common output signal for segment display.
Used to display icon and marks beside the character
display.
Acts as common output signals for character display.
COM15 toCOM24 become non-selective waveforms
when the duty ratio is 1/14.
Acts as common output sign al (COM25) for character
display when EXT2 bit is 0. Acts as a common
extension pulse signal (COMD) when EXT2 bit is 1.
The pin is grounded after RESET input is cleared.
When this signal is used as COMD, GND
maintained.
Status register (read)
RAM data (read/write)
V5 must be