SC92031L SILAN [Silan Microelectronics Joint-stock], SC92031L Datasheet - Page 27

• Manufacturer Part Number: SC92031L
• Description: 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER
• Manufacturer: SILAN [Silan Microelectronics Joint-stock]

ILR: Interrupt Line Register
by the POST software to set interrupt line for the SC92031.
IPR: Interrupt Pin Register
uses INTA interrupt pin. Read only. IPR = 01H.
MNGNT: Minimum Grant Timer: Read only
field will be set to a value from the external EEPROM. If there is no EEPROM, this field will default to a value of
20h.
MXLAT: Maximum Latency Timer: Read only
be set to a value from the external EEPROM. If there is no EEPROM, this field will default to a value of 20h.
3 The Default Value after Power-on (RSTB asserted)
The Default Value of PCI Configuration
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
No.
00h
01h
02h
03h
04h
05h
31-18
17-11
The Interrupt Line Register is an 8-bit register used to communicate with the routing of the interrupt. It is written
The Interrupt Pin register is an 8-bit register indicating the interrupt pin used by the SC92031. The SC92031
Specifies how long a burst period the SC92031 needs at 33 MHz clock rate in units of 1/4 microsecond. This
Specifies how often the SC92031 needs to gain access to the PCI bus in unit of 1/4 microsecond. This field will
10-1
Bit
0
Command
Name
BMAR31-18
VID
DID
ROMSIZE
BROMEN
Symbol
-
Type
W
W
R
R
R
R
R
R
Boot ROM Base Address
These bits indicate how many Boot ROM spaces to be supported.
The Relationship between <BS2:0> and BMAR17-11 is the following:
BS2 BS1 BS0 Description
Read back a zero
Boot ROM Enable: This is used by the PCI BIOS to enable accesses to Boot ROM.
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
VID15
DID15
VID7
DID7
Bit7
0
0
No Boot ROM, BROMEN=0 (R)
8K Boot ROM, BROMEN (R/W), BMAR12-11 = 0 (R), BMAR17-13 (R/W)
16K Boot ROM, BROMEN (R/W), BMAR13-11 = 0 (R), BMAR17-14 (R/W)
32K Boot ROM, BROMEN (R/W), BMAR14-11 = 0 (R), BMAR17-15 (R/W)
64K Boot ROM, BROMEN (R/W), BMAR15-11 = 0 (R), BMAR17-16 (R/W)
128K Boot ROM, BROMEN(R/W), BMAR16-11=0 (R), BMAR17 (R/W)
unused
unused
-
-
PERRSP
VID14
DID14
VID6
DID6
Bit6
0
0
-
VID13
DID13
VID5
DID5
Bit5
0
0
-
-
Description
DID12
VID12
DID4
VID4
Bit4
0
0
-
-
DID11
VID11
DID3
VID3
Bit3
0
-
-
-
VID10
DID10
BMEN
DID2
VID2
Bit2
0
0
REV:1.0
MEMEN
VID1
VID9
DID1
DID9
Bit1
0
0
SC92031
-
(To be continued)
Page 27 of 38
2004.08.03
SERREN
IOEN
VID0
VID8
DID0
DID8
Bit0
0
0