emif02-spk02f2 STMicroelectronics, emif02-spk02f2 Datasheet

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emif02-spk02f2

Manufacturer Part Number
emif02-spk02f2
Description
2 Line Emi Filter And Esd Protection
Manufacturer
STMicroelectronics
Datasheet

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EMIF02-SPK02F2
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emif02-spk02f2B7
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Features
Complies with the following standards
Application
Mobile phones
Description
The EMIF02-SPK02F2 chip is a highly integrated
device designed to suppress EMI/RFI noise for
interface line filtering.
The EMIF02-SPK02F2 Flip-Chip packaging
means the package size is equal to the die size.
That's why the EMIF02-SPK02F2 is a very small
device.
Additionally, this filter includes ESD protection
circuitry, which prevents damage to the protected
device when subjected to ESD surges up 30 kV.
September 2008
Lead free package
Very low resistance: 0.35 Ω
High attenuation: - 45 dB at 900 MHz
Very low PCB space consumption:
0.89 mm x 1.26 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
IEC6 1000-4-2 level 4
High reliability offered by monolithic integration
High reduction of parasitic elements through
integration and wafer level packaging
IEC 61000-4-2 level 4
– 15 kV (air discharge)
– 8 kV (contact discharge)
2-line IPAD™, EMIF filter and ESD protection
Rev 1
Figure 1.
Figure 2.
TM: IPAD is a trademark of STMicroelectronics
Input
Input
Pin configuration (bump side)
Functional schematic
EMIF02-SPK02F2
Flip Chip package
3
O1
O2
(5 bumps)
GND
2
I2
I1
1
A
B
C
Output
Output
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emif02-spk02f2 Summary of contents

Page 1

... EMI/RFI noise for interface line filtering. The EMIF02-SPK02F2 Flip-Chip packaging means the package size is equal to the die size. That's why the EMIF02-SPK02F2 is a very small device. Additionally, this filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges ...

Page 2

... line R f Cut-off frequency 2/7 amb Parameter = 25 °C) amb Parameters RM Test conditions = DC, 1 MHz = Z SOURCE LOAD EMIF02-SPK02F2 = 25 °C) Value 30 30 350 -30 to 125 - 150 Min Typ Max 6 400 0.35 0.8 185 250 315 = 50 Ω 20 Unit kV mA °C ° ...

Page 3

... EMIF02-SPK02F2 Figure 3. S21 attenuation measurement dB 0.00 -10.00 -20.00 -30.00 -40.00 F (Hz) -50.00 100.0k 1.0M 10.0M I1-O1 Figure 5. ESD response to IEC 61000-4-2 (+15 kV air discharge) on one input V and on one output V (in) 5 V/div Figure 7. Line capacitance versus applied voltage 270 250 230 210 190 170 150 Figure 4. dB 0.00 -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 100.0M 1.0G I2-O2 Figure 6. (out) 5 V/div ...

Page 4

... Ordering information scheme 2 Ordering information scheme Figure 8. Ordering information scheme EMI Filter Number of lines Information x = resistance value (Ohms capacitance value / 10(pF letters = application 2 digits = version Package F = Flip Chip lead-free, pitch = 500 µm, bump = 315 µm 4/7 EMIF02-SPK02F2 EMIF yy - xxx zz Fx ...

Page 5

... EMIF02-SPK02F2 3 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 6

... Document revision history Date Revision 17-Sep-2008 6/7 Dot identifying Pin A1 location ST E xxz yww User direction of unreeling Marking Package JD Flip Chip 1 Initial release. EMIF02-SPK02F2 Ø 1.5 ± 0.1 4 ± 0 xxz xxz yww yww 4 ± 0.1 Weight Base qty Delivery mode 1.8 mg 5000 Tape and reel 7” ...

Page 7

... EMIF02-SPK02F2 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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