alc888s Realtek Semiconductor Corporation, alc888s Datasheet - Page 33

• Manufacturer Part Number: alc888s
• Description: 7.1+2 Channel High Definition Audio Codec With Two Independent S/pdif-out
• Manufacturer: Realtek Semiconductor Corporation

Note: The response stream in the link protocol is 36-bits wide. The response is placed in the lower 32-bit
field. Bit-35 is a ‘Valid’ bit to indicate the response is ‘Ready’. Bit-34 is set to indicate that an unsolicited
response was sent.
7.5.
The ALC888S does not support Wake-Up events when in low-power mode. All power management state
changes in widgets are driven by software. Table 16, page 25, shows the System Power State Definitions.
In the ALC888S, all the widgets, including output/input converters, support power control. Software may
have various power states depending on system configuration. Table 17, page 26, indicates those nodes
that support power management. To simplify power control, software can configure whole codec power
states through the audio function (NID=01h). Output converters (DACs) and input converters (ADCs)
have no individual power control to supply fine-grained power control.
7.5.1.
7.1+2 Channel High Definition Audio Codec
w/Two Independent S/PDIF-OUT
Power States
D3 (Cold)
D3 (Hot)
Bit [35]
Valid
D0
D1
D2
Bit [35]
Power Management
Valid
System Power State Definitions
Definitions
All power on. Individual DACs and ADCs can be powered up or down as required.
All amplifiers and converters (DACs and ADCs) are powered down. State maintained, analog
reference stays up.
All amplifiers and converters (DACs and ADCs) are powered down. State maintained, but
analog reference is off (D1 + analog reference off).
Power still supplied. The codec stops the internal clock. State is maintained.
All power removed. State lost.
Unsol=1
Bit [34]
Table 16. System Power State Definitions
Table 15. Unsolicited Response Format
Table 14. Solicited Response Format
Unsol=0
Bit [34]
Bit [33:32]
Reserved
25
Bit [33:32]
Reserved
Bit [31:28]
Tag
ALC888S & ALC888SDD
Track ID: JATR-1076-21
Bit [31:0]
Response
Bit [27:0]
Response
Datasheet
Rev. 1.2