alc883 Realtek Semiconductor Corporation, alc883 Datasheet - Page 7

• Manufacturer Part Number: alc883
• Description: 7.1+2 Channel High Definition Audio Codec
• Manufacturer: Realtek Semiconductor Corporation

ALC883 Series
Datasheet
Table 45. Verb – Get Converter Format (Verb ID=Ah) ............................................................................43
Table 46. Verb – Set Converter Format (Verb ID=2h)..............................................................................44
Table 47. Verb – Get Power State (Verb ID=F05h) ..................................................................................45
Table 48. Verb – Set Power State (Verb ID=705h) ...................................................................................46
Table 49. Verb – Set Converter Stream, Channel (Verb ID=706h)...........................................................47
Table 50. Verb – Get Pin Widget Control (Verb ID=F07h) ......................................................................47
Table 51. Verb – Set Pin Widget Control (Verb ID=707h) .......................................................................48
Table 52. Verb – Get Unsolicited Response Control (Verb ID=F08h) .....................................................49
Table 53. Verb – Set Unsolicited Response Control (Verb ID=708h) ......................................................49
Table 54. Verb – Get Pin Sense (Verb ID=F09h)......................................................................................50
Table 55. Verb – Execute Pin Sense (Verb ID=709h)...............................................................................50
Table 56. Verb – Get Configuration Default (Verb ID=F1Ch) .................................................................51
Table 57. Verb – Set Configuration Default Bytes 0, 1, 2, 3
(Verb ID=71Ch/71Dh/71Eh/71Fh for Bytes 0, 1, 2, 3) ............................................................51
Table 58. Verb – Get BEEP Generator (Verb ID= F0Ah).........................................................................52
Table 59. Verb – Set BEEP Generator (Verb ID= 70Ah)..........................................................................52
Table 60. Verb – Get GPIO Data (Verb ID= F15h) ..................................................................................53
Table 61. Verb – Set GPIO Data (Verb ID= 715h) ...................................................................................53
Table 62. Verb – Get GPIO Enable Mask (Verb ID= F16h) .....................................................................54
Table 63. Verb – Set GPIO Enable Mask (Verb ID=716h).......................................................................54
Table 64. Verb – Get GPIO Direction (Verb ID=F17h)............................................................................55
Table 65. Verb – Set GPIO Direction (Verb ID=717h).............................................................................55
Table 66. Verb – Get GPIO Unsolicited Response Enable Mask (Verb ID=F19h) ..................................56
Table 67. Verb – Set GPIO Unsolicited Response Enable Mask (Verb ID=719h) ...................................56
Table 68. Verb – Function Reset (Verb ID=7FFh)....................................................................................57
Table 69. Verb – Get Digital Converter Control 1 & Control 2 (Verb ID= F0Dh, F0Eh) ........................57
Table 70. Verb – Set Digital Converter Control 1 & Control 2 (Verb ID=70Dh, 70Eh) ..........................59
Table 71. Absolute Maximum Ratings .....................................................................................................61
Table 72. Threshold Voltage .....................................................................................................................61
Table 73. Digital Filter Characteristics .....................................................................................................62
Table 74. S/PDIF Input/Output Characteristics ........................................................................................62
Table 75. Link Reset and Initialization Timing ........................................................................................63
Table 76. Link Timing Parameters at the Codec.......................................................................................64
Table 77. S/PDIF Output and Input Timing..............................................................................................65
Table 78. Analog Performance .................................................................................................................66
Table 79. Ordering Information ................................................................................................................70
7.1+2 Channel High Definition Audio Codec
vii
Track ID: JATR-1076-21
Rev. 1.3