ks0078 Samsung Semiconductor, Inc., ks0078 Datasheet
ks0078
Related parts for ks0078
ks0078 Summary of contents
Page 1
... KS0078 INTRODUCTION KS0078 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It can display lines with dots format. FUNCTIONS Character type dot matrix LCD driver & controller Internal driver : 34 common and 120 segment signal output ...
Page 2
... KS0078 Table 1. Programmable duty cycles 5-dot font width Display Line Duty Ratio Numbers Displayable characters 1 1/17 1 line of 48 characters 2 1/33 2 lines of 48 characters 4 1/33 4 lines of 24 characters 6-dot font width Display Line Duty Ratio Numbers Displayable characters 1 1/17 1 line of 40 characters ...
Page 3
... KS0078 BLOCK DIAGRAM Power On Reset (POR) RESET IM 8 Instruction / Register RS/ CS (IR) System E/ Interface SCLK Serial RW/ 4 bit SID 8 bit 7 / Data 8 8 DB4 - Register DB7 / / (DR Input/ DB3 - Output DB1 Buffer Busy / 3 Flag DB0/ SOD SegmentRAM (SEGRAM) 16 bytes Vci C1 Voltage Converter C2 V5OUT2 ...
Page 4
... KS0078 PAD CONFIGURATION SEG79 1 SEG80 2 SEG81 3 SEG82 4 SEG83 5 SEG84 6 SEG85 7 SEG86 8 SEG87 9 SEG88 10 SEG89 11 SEG90 12 SEG91 13 SEG92 14 SEG93 15 SEG94 16 SEG95 17 SEG96 18 SEG97 19 SEG98 20 SEG99 21 SEG100 22 SEG101 23 SEG102 24 SEG103 25 SEG104 26 SEG105 27 SEG106 28 SEG107 29 SEG108 30 SEG109 31 SEG110 32 SEG111 33 SEG112 34 SEG113 35 chip size : 5340 x 8740 ...
Page 5
... KS0078 PAD LOCATION COORDINATE COORDINATE PAD PAD PAD PAD NO. NAME NO. NAME ...
Page 6
... KS0078 COORDINATE COORDINATE PAD PAD PAD PAD NO. NAME NO. NAME 116 ...
Page 7
... KS0078 PAD DESCRIPTION PAD (NO) INPUT/ NAME OUTPUT VDD (60) VSS1,VSS2 - (66,81) V1-V5 Power supply (88-84) Vci (78) Input SEG1-SEG120 Output Segment output Segment signal output for LCD drive. (106-183, 1-42) COM0-COM33 Output Common output Common signal output for LCD drive. (105-89, 43-59) OSC1,OSC2 Input Oscillator (61,62) (OSC1), Output (OSC2) ...
Page 8
... KS0078 PAD DESCRIPTION (continued) INPUT/ PAD (NO) NAME OUTPUT IM (64) Input Interface mode selection Register select/ RS/CS (67) Input Chip select RW/SID (68) Input Read_write/ Serial input data E/SCLK (69) Input Read_write enable/Serial clock DB0/SOD (70) Input_Output/ Data bus 0 bit/Serial output Output data DB1-DB3 Input. Data bus 1- 7 ...
Page 9
... KS0078 FUNCTION DESCRIPTION System Interface This chip has all three kinds interface type with MPU : serial, 4-bit bus and 8-bit bus. Serial and bus(4-bit/8-bit) is selected by IM input, and 4-bit bus and 8-bit bus is selected by DL bit in the instruction register. ...
Page 10
... KS0078 Display Data RAM (DDRAM) DDRAM stores display data of maximum 96 8 bits (96 characters). DDRAM address is set in the address counter (AC hexadecimal number. (refer to Fig-1.) Fig-1. DDRAM Address 1) Display of 5-dot font width character 5-dot 1 line display In the case of 1 line display with 5-dot font, the address range of DDRAM is 00H ~ 5FH. (Refer to Fig-2) ...
Page 11
... KS0078 5-dot 2 line display In the case of 2 line display with 5-dot font, the address range of DDRAM is 00H ~ 2FH, 40H ~ 6FH. (refer to Fig-3) ...
Page 12
... KS0078 5-dot 4 line display In the case of 4 line display with 5-dot font, the address range of DDRAM is 00H ~ 17H, 20H ~ 37H, 40H ~ 57H, 60H ~ 77H. (refer to Fig-4) ...
Page 13
... KS0078 2) Display of 6-dot font width character 6-dot 1 line display In the case of 1 line display with 6-dot font, the address range of DDRAM is 00H ~ 5FH. (refer to Fig-5) ...
Page 14
... KS0078 6-dot 2 line display In the case of 2 line display with 6-dot font, the address range of DDRAM is 00H ~ 2FH, 40H ~ 6FH. (refer to Fig-6) ...
Page 15
... KS0078 6-dot 4 line display In the case of 4 line display with 6-dot font, the address range of DDARM is 00H ~ 17H, 20H ~ 37H, 40H ~ 57H, 60H ~ 77H. (refer to Fig- ...
Page 16
... KS0078 Timing Generation Circuit Timing generation circuit generates clock signals for the internal operations. Address Counter (AC) Address Counter(AC) stores DDRAM/CGRAM/SEGRAM address, transferred from IR. After writing into (reading from) DDRAM/CGRAM/SEGRAM automatically increased (decreased When RS = "Low" and R/W = "High", AC can be read through DB0~DB6 Cursor/Blink Control Circuit It controls cursor/blink ON/OFF and black/white inversion at cursor position ...
Page 17
... KS0078 CGROM (Character Generator ROM) CGROM has 5 8-dot 240 character pattern. (refer to Table 3) Table 3. CGROM Character Code Table 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 18
... KS0078 CGRAM (Character Generator RAM) CGRAM has 8-dot 8 characters. By writing font data to CGRAM, user defined character can be used. (Refer to Table 4) Table 4. Relationship between Character Code(DDRAM) and Character Pattern(CGRAM dot Character pattern ...
Page 19
... KS0078 dot Character pattern * 1. When BE(Blink Enable bit) = "High", blink is controlled by B1 and B0 bit. In displaying 5-dot font width, when B1 = "1", enabled dots will blink, and When B1 = "0" and B0 = "1", enabled dots in P4 will blink, when B1 = "0" and B0 = " ...
Page 20
... KS0078 SEGRAM (Segment Icon RAM) SEGRAM has segment control data and segment pattern data. During 1-line display mode, COM0(COM17) makes the data of SEGRAM enable to display icons. When used in 2/4-line display mode COM0(COM33) does that. Its higher 2-bits are blinking control data, and lower 6-bits are pattern data. (refer to Table 5 and Fig-8) Table 5 ...
Page 21
... KS0078 1) 5-dot font width ( ...
Page 22
... INSTRUCTION DESCRIPTION OUTLINE To overcome the speed difference between internal clock of KS0078 and MPU clock, KS0078 performs internal operation by storing control information DR. The internal operation is determined according to the signal from MPU, composed of read/write and data bus. (refer to Table 6/10) Instruction can be divided largely four kinds, (1) KS0078 function set instructions ( set display methods, set data length, etc ...
Page 23
... KS0078 (1) INSTRUCTION DESCRIPTION 1 (IE = "High") Table 6. Instruction Set 1 Instruction RE Instruction Code R R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 S Clear Display Return Home Power Down Mode Entry ...
Page 24
... KS0078 Instruction Code Instruction RE R R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 S Cursor S/C R/L X Display Shift Shift DS4 DS3 DS2 DS1 Enable Scroll HS4 HS3 HS2 HS1 Enable ...
Page 25
... KS0078 Instruction Code Instruction RE R R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 S Set AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter. CGRAM Address Set AC3 AC2 AC1 AC0 SEGRAM Address Set ...
Page 26
... Power down mode enable bit set instruction. When PD = "High", it makes KS0078 suppress current consumption except the current needed for data storage by executing next three functions. 1. make the output value of all the COM/SEG ports VDD 2. make the COM/SEG output value of extension driver VDD by setting D output to "High" ...
Page 27
... KS0078 4) Entry Mode Set ( Set the moving direction of cursor and display. I/D : Increment / decrement of DDRAM address (cursor or blink) When I/D = "High", cursor/blink moves to right and DDRAM address is increased by 1. When I/D = "Low", cursor/blink moves to left and DDRAM address is decreased CGRAM/SEGRAM operates the same as DDRAM, when read from or write to CGRAM/SEGRAM. ...
Page 28
... KS0078 5) Display ON/OFF Control ( Control display/cursor/blink ON/OFF 1 bit register Display ON/OFF control bit When D = "High", entire display is turned on. When D = "Low", display is turned off, but display data is remained in DDRAM Cursor ON/OFF control bit When C = "High", cursor is turned on. When C = "Low", cursor is disappeared in current display, but I/D register remains its data. ...
Page 29
... KS0078 6-bit s CGROM 8 p character ont (5-dot ) (CGROM) Fig-9. 6-dot font width CGROM/CGRAM 7) Cursor or Display Shift ( Without writing or reading of display data, shift right/left cursor position or display. This instruction is used to correct or search display data.(Refer to Table 7) During 2-line mode display, cursor moves to the 2nd line after 48th digit of 1st line. ...
Page 30
... KS0078 8) Shift/Scroll Enable ( ( HS : Horizontal Scroll per Line Enable This instruction makes valid dot shift by a display line unit. HS1, HS2, HS3 and HS4 indicate each line to be dot scrolled, and each scroll is performed individually in each line. If the line in 1-line display mode or the 1st line in 2-line display mode scrolled, set HS1 and HS2 to "High". ...
Page 31
... KS0078 9) Function Set ( DL : Interface data length control bit When DL = "High", it means 8-bit bus mode with MPU. When DL = "Low", it means 4-bit bus mode with MPU. Hence signal to select 8-bit or 4-bit bus mode. In 4-bit bus mode required to transfer 4-bit data by two times. ...
Page 32
... KS0078 ( DL : Interface data length control bit When DL = "High", it means 8-bit bus mode with MPU. When DL = "Low", it means 4-bit bus mode with MPU. Hence signal to select 8-bit or 4-bit bus mode. When 4-bit bus mode required to transfer 4-bit data twice. ...
Page 33
... Setting SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units. (Refer to Table 9). In this case of KS0078 can show hidden areas of DDRAM by executing smooth scroll from dots. Table 9. Scroll quantity according to HDS bits SQ5 SQ4 SQ3 SQ2 0 0 ...
Page 34
... This instruction shows whether KS0078 is in internal operation or not. If the resultant BF is High, the internal operation is in progress and you have to wait until Low, which by then the next instruction can be performed. In this instruction you can read the value of address counter. ...
Page 35
... KS0078 (2) INSTRUCTION DESCRIPTION 2 (IE = "LOW") Table 10. Instruction Set 2 Instruction Code Instruction RE R R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 S Clear Display Return Home Entry Mode Set Display ...
Page 36
... KS0078 Instruction RE Instruction Code R R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 S Scroll HS4 HS3 HS2 HS1 Enable RE( Function Set RE( Set AC5 AC4 AC3 AC2 AC1 AC0 ...
Page 37
... KS0078 1) Display Clear Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM address to "00H" into AC (address counter). Return cursor to the original status, hence, bring the cursor to the left edge on first line of the display. And entry mode is set to increment mode (I/D = "1"). ...
Page 38
... KS0078 4) Display ON/OFF Control ( Control display/cursor/blink ON/OFF 1 bit register Display ON/OFF control bit When D = "High", entire display is turned on. When D = "Low", display is turned off, but display data is remained in DDRAM Cursor ON/OFF control bit When C = "High", cursor is turned on. When C = "Low", cursor is disappeared in current display, but I/D register remains its data. ...
Page 39
... KS0078 6-bit s CGROM p 8 character ont t e (5-dot ) (CGROM) Fig-10. 6-dot font width CGROM/CGRAM 6) Cursor or Display Shift ( Shift right/left cursor position or display, without writing or reading of display data. This instruction is used to correct or search display data.(Refer to Table 7) During 2-line mode display, cursor moves to the 2nd line after 48th digit of 1st line. ...
Page 40
... KS0078 7) Scroll Enable ( HS : Horizontal Scroll per Line Enable This instruction makes valid dot shift by a display line unit. HS1, HS2, HS3 and HS4 indicate each line to be dot scrolled, and each scroll is performed individually in each line. If the line in 1-line display mode or the 1st line in 2-line display mode scrolled, set HS1 and HS2 to " ...
Page 41
... KS0078 @ ( DL : Interface data length control bit When DL = "High", it means 8-bit bus mode with MPU. When DL = "Low", it means 4-bit bus mode with MPU. Hence signal to select 8-bit or 4-bit bus mode. In 4-bit bus mode required to transfer 4-bit data twice Display line number control bit It is variable only when NW bit of extended function set instruction is Low. When N = " ...
Page 42
... Setting SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units. (Refer to Table 12). In this case of KS0078 execute dot smooth scroll from dots. Table 12. Scroll quantity according to HDS bits SQ5 SQ4 SQ3 SQ2 ...
Page 43
... This instruction shows whether KS0078 is in internal operation or not. If the resultant BF is High, it means the internal operation is in progress and should wait until BF to become “Low”. which by then the next instruction can be performed. In this instruction value of address counter can also be read. ...
Page 44
... KS0078 INTERFACE WITH MPU KS0078 can transfer data in bus mode (4-bit or 8-bit) or serial mode with MPU. Hence, both types 8-bit MPU can be used. In case of 4-bit bus mode, data transfer is performed by twice to transfer 1 byte data. (1) When interfacing data length are 4-bit, only 4 ports, from DB4 to DB7, are used as data bus. ...
Page 45
... Fig 11. Example of 8-bit Bus Mode Timing Sequence 2) Interface with 4-bits MPU If 4-bits MPU is used, KS0078 can connect directly with this. In this case, port E, RS, R/W and DB4 to DB7 need to interface each other. The transfer is performed by twice. Example of timing sequence is shown below. ...
Page 46
... Fig 13. Fig 14) (1) Write Operation (R After start byte is transferred from MPU to KS0078, 8-bit data is transferred which is divided into 2 bytes, each byte has 4 bit's real data and 4 bit's partition token data. For example, if real data is "10110001" (D0 - D7), then serially transferred data becomes " ...
Page 47
... KS0078 " # ! " # Fig 13. Timing Diagram of Serial Data Transfer 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD $ % '(( & & )! $ % '(( ...
Page 48
... KS0078 * * * + , ...
Page 49
... KS0078 ...
Page 50
... KS0078 ...
Page 51
... KS0078 ...
Page 52
... DS = 0000 : Shift per line disable E Set scroll Quantity instruction SQ = 000000 : Not scroll 2) Initializing by Hardware RESET input When RESET pin = "Low", KS0078 can be initialized like the case of power on reset. During the power on reset operation, this pin is ignored. 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 53
... KS0078 INITIALIZING BY INSTRUCTION 1) 8-bit interface mode Power on Wait for more than 20 ms after VDD rises to 4.5V Function set RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (1) Wait for more than 39 s Dsplay ON/OFF Control DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
Page 54
... KS0078 2) 4-bit interface mode Power on Wait for more than 20 ms after VDD rises to 4.5V Function set RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (0) Wait for more than 39 s Function set DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
Page 55
... KS0078 EXAMPLE OF INSTRUCTION AND DISPLAY CORRESPONDENCE "Low" 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 56
... KS0078 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 57
... KS0078 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 58
... KS0078 "High" 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 59
... KS0078 ...
Page 60
... KS0078 " #$%$ &'(()* '(() #$%$ &'(() 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 61
... KS0078 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 62
... KS0078 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 63
... KS0078 ) * + # %'' $ % & " # '' ( (& !" !" !" 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ...
Page 64
... KS0078 FRAME FREQUENCY 1) 1/17 duty cycle V Item 5-dot font width 1-line selection period Frame frequency 2) 1/33 duty cycle V Item 5-dot font width 1-line selection period Frame frequency 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Display Font Width 6-dot font width ...
Page 65
... KS0078 POWER SUPPLY FOR DRIVING LCD PANEL 1) When an external power supply is used 2) When an internal booster is used (Boosting twice) VDD V VDD CI + GND V5OUT2 V5OUT3 V5 - Can be detached not using powr down mode * 1. Boosted output voltage should not exceed the maximum value ( the LCD driving voltage. ...
Page 66
... KS0078 MAXIMUM ABSOLUTE RATE Characteristic Symbol Power Supply Voltage (1) Power Supply Voltage (2) Input Voltage Operating Temperature Storage Temperature * Voltage greater than above may damage to the circuit (VDD 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Value V -0 -15 +0.3 LCD ...
Page 67
... KS0078 ELECTRICAL CHARACTERISTICS DC Characteristics Characteristic Symbol Operating Voltage V DD Supply Current I Internal oscillation or external clock. DD Input Voltage (1) V IH1 (Except OSC1) V IL1 Input Voltage (2) V IH2 (OSC1) V IL2 Output Voltage (1) V OH1 (DB0 to DB7) V OL1 Output Voltage(2) V OH2 (except DB0 to DB7) ...
Page 68
... KS0078 AC Characteristics Mode Item E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) (1) Write Mode R/W and RS Setup Time (refer to Fig-15) R/W and RS Hold Time Data Setup Time Data Hold Time E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) (2) Read Mode R/W and RS Setup Time ...
Page 69
... KS0078 AC Characteristics (continued) Mode Item E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) (4) Write Mode R/W and RS Setup Time (refer to Fig-15) R/W and RS Hold Time Data Setup Time Data Hold Time E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) (5) Read Mode ...
Page 70
... KS0078 V IH1 RS V IL1 tsu1 R/W V IL1 V IH1 E V IL1 t R DB0~DB7 V IH1 RS V IL1 IH1 R/W V IH1 E V IL1 t R DB0~DB7 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD IL1 IH1 V V IL1 IL1 SU2 V V IH1 ...
Page 71
... KS0078 CS V IL1 t SU1 V IH1 SCLK V IL1 SID t D SOD Reset Timing (V = 2.7 to 5.5V -30 to +85) DD Item Symbol Reset low level width t RES (Refer to Fig-18) RESET V IL1 Fig-18. Reset Timing Diagram 34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD IL1 ...