MRF24J40-I MICROCHIP [Microchip Technology], MRF24J40-I Datasheet - Page 26

• Manufacturer Part Number: MRF24J40-I
• Manufacturer: MICROCHIP [Microchip Technology]

6.4
The medium access control layer of the MRF24J40
consists of several registers that define how this device
operates on an IEEE 802.15.4 network.
6.4.1
The RXMCR, described in Section 6.2 “Receive
Filters”, should be set to the appropriate value for the
intended device operation. If the device is operating as
a PAN coordinator, the PANCOORD bit should be set.
If the device is operating as a coordinator, then the
COORD bit should be set.
REGISTER 6-7:
REGISTER 6-8:
DS39776A-page 24
MRF24J40
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4-3
bit 2
bit 1-0
R/W-0
W-0
r
MAC Initialization
DEVICE CONFIGURATION
CHANNEL7:CHANNEL4: Channel Number bits
00000 = Channel 11
00001 = Channel 12
00010 = Channel 13
11111 = Channel 26
Unimplemented: Read as ‘0’
Reserved: Maintain as ‘0’
Unimplemented: Read as ‘0’
Reserved: Maintain as ‘0’
RFRST: RF Reset bit
1 = Reset RF (turn off RF)
0 = Normal operation
Reserved: Maintain as ‘0’
…
R/W-0
CHANNEL<7:4>
U-0
—
RFCTRL0: RF CONTROL REGISTER 0
RFCTL: RF MODE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
—
Advance Information
R/W-0
R/W-0
r
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
6.4.2
The operational channel is selected using the
RFCTRL0 register.
U-0
—
r
CHANNEL SELECTION
RFRST
R/W-0
U-0
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
U-0
—
r
R/W-0
U-0
—
r
bit 0
bit 0