74LCX38SJX Fairchild Semiconductor, 74LCX38SJX Datasheet
74LCX38SJX
Specifications of 74LCX38SJX
Related parts for 74LCX38SJX
74LCX38SJX Summary of contents
Page 1
... Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol IEEE/IEC Pin Descriptions © 2005 Fairchild Semiconductor Corporation Features 5V tolerant inputs 2.3V to 3.6V V specifications provided CC 5 max ( Power down high impedance inputs and outputs ...
Page 2
Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Sink Current ( ...
Page 3
AC Electrical Characteristics Symbol Parameter t Propagation Delay Time PZL t PLZ t Output to Output Skew OSHL t (Note 5) OSLH Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for ...
Page 4
AC Loading and Waveforms (C t PZL 3-STATE Output Low Enable and Disable Times for Logic (Input Pulse Characteristics 1MHz, t Symbol www.fairchildsemi.com Generic for LCX Family FIGURE 1. AC ...
Page 5
Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 5 www.fairchildsemi.com ...
Page 6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14D 6 ...
Page 7
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...