m3819 Renesas Electronics Corporation., m3819 Datasheet - Page 12

• Manufacturer Part Number: m3819
• Description: Mitsubishi 8-bit Single-chip Microcomputer 740 Family / 38000 Series
• Manufacturer: Renesas Electronics Corporation.

vii
Fig. 2.5.18 Control procedure of Segment key-scan ..................................................................... 121
Fig. 2.5.19 Connection diagram [FLD automatic display and Key-scan using digit pin] .......... 122
Fig. 2.5.20 Timing chart [FLD automatic display and Key-scan using digit pin] ...................... 122
Fig. 2.5.21 Setting of related registers (1) [FLD automatic display and Key-scan using digit pin] ........... 123
Fig. 2.5.22 Setting of related registers (2) [FLD automatic display and Key-scan using digit pin] ........... 124
Fig. 2.5.23 Example of FLD digit allocation [FLD automatic display and Key-scan using digit pin] ......... 126
Fig. 2.5.24 Control procedure [FLD automatic display and Key-scan using digit pin] .............. 127
Fig. 2.5.25 Control procedure of Digit key-scan ............................................................................. 128
Fig. 2.5.26 Connection diagram [FLD display by software] .......................................................... 129
Fig. 2.5.27 Timing chart [FLD display by software] ....................................................................... 129
Fig. 2.5.28 Enlarged view of Key-scan of ports P3
Fig. 2.5.29 Setting of related registers [FLD display by software] .............................................. 130
Fig. 2.5.30 Example of FLD digit allocation [FLD display by software] ...................................... 131
Fig. 2.5.31 Control procedure [FLD display by software] .............................................................. 132
Fig. 2.5.32 Connection diagram [5
Fig. 2.5.33 Timing chart [5
Fig. 2.5.34 Setting of related registers (1) [5
Fig. 2.5.35 Setting of related registers (2) [5
Fig. 2.5.36 Example of FLD digit allocation and segment arrangment ....................................... 137
Fig. 2.5.37 Setting example of display data (in case of using DIG
Fig. 2.5.38 Control procedure [5
Fig. 2.6.1 Structure of Interrupt interval determination register ................................................... 139
Fig. 2.6.2 Structure of Interrupt interval determination control register ...................................... 139
Fig. 2.6.3 Structure of Interrupt edge selection register ............................................................... 140
Fig. 2.6.4 Structure of Interrupt request register 1 ........................................................................ 140
Fig. 2.6.5 Structure of Interrupt control register 1 ......................................................................... 141
Fig. 2.6.6 Connection diagram [Reception of remote-control signal] ........................................... 142
Fig. 2.6.7 Function block diagram [Reception of remote-control signal] ..................................... 142
Fig. 2.6.8 Timing chart of data determination ................................................................................. 143
Fig. 2.6.9 Setting of related registers [Reception of remote-control signal] ............................... 144
Fig. 2.6.10 Control procedure (1) [Reception of remote-control signal] ...................................... 145
Fig. 2.6.11 Control procedure (2) [Reception of remote-control signal] (Timer 2 interrupt) ..... 146
Fig. 2.7.1 Structure of Zero cross detection control register ........................................................ 147
Fig. 2.7.2 Structure of Interrupt edge selection register ............................................................... 147
Fig. 2.7.3 Structure of Interrupt request register 1 ........................................................................ 148
Fig. 2.7.4 Structure of Interrupt control register 1 ......................................................................... 148
Fig. 2.7.5 Connection example of Zero cross detection circuit .................................................... 149
Fig. 2.7.6 Setting of related registers
Fig. 2.7.7 Control procedure [Clock count using ZCR interrupt (without using a noise filter)] ....................... 151
Fig. 2.7.8 Setting of related registers [Clock count using ZCR interrupt (using a noise filter)]................... 152
Fig. 2.7.9 Control procedure [Clock count using ZCR interrupt (using a noise filter)] ..................................... 153
Fig. 2.8.1 Example of Poweron reset circuit ................................................................................... 154
Fig. 2.8.2 RAM back-up system ........................................................................................................ 154
Fig. 2.9.1 Structure of Timer i ........................................................................................................... 155
Fig. 2.9.2 Structure of Timer 2 .......................................................................................................... 155
Fig. 2.9.3 Structure of Timer 12 mode register .............................................................................. 156
Fig. 2.9.4 Structure of Timer 34 mode register .............................................................................. 156
Fig. 2.9.5 Structure of CPU mode register ...................................................................................... 157
Fig. 2.9.6 Structure of Interrupt request register 1 ........................................................................ 157
Fig. 2.9.7 Structure of Interrupt request register 2 ........................................................................ 158
[Clock count using ZCR interrupt (without using a noise filter)] ................................ 150
7 dot display] ................................................................................... 133
3819 Group USER’S MANUAL
7 dot display] ......................................................................... 138
7 dot display] ...................................................................... 133
7 dot display] .................................................... 134
7 dot display] .................................................... 135
0
to P3
7
......................................................... 130
11
pin) ................................. 137
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