am336-2 AME, Inc., am336-2 Datasheet - Page 5

• Manufacturer Part Number: am336-2
• Description: Ic For Opto Detector - Analog Microelectronics
• Manufacturer: AME, Inc.

IC FOR OPTO DETECTOR
AM 336
Signal detection stage:
Triggered window comparator, trigger at the end of emitting–pulse, "one pulse system" (no signal
filtering).
Output stages:
Two antivalent outputs for external PNP Darlington transistors, short circuit protection with
external resistor, periodically shutdown with a duty cycle of 1%.
LED driver:
Push–pull output, indicates state of the output stages.
Z–diode:
For supply voltage stabilisation with an external transistor, so the maximum system operating
voltage depends only on external elements (wide voltage range possible).
Signal emission:
Emission pulses for applications with internal synchronisation are generated by the oscillator.
Signal detection:
Photodiode current at pin INA is converted by the amplifier. Amplifier output (pin OUTA) is
connected via a capacitor (CIN) to the signal detection input (pin IND). The signal is applied to the
comparators A and B. At the end of the emitting pulse the output state of the comparators is taken
over to the flip–flop A and B. Flip–flop A controls the output stages QO and QC.
External synchronisation:
A valid recepted light pulse synchronises the at low frequency running oscillator, pulse length and
period have to be appropriate.
OSCILLATOR:
The frequency f
of the on-chip oscillator is set by external resistor R
and capacitor C
(pin FO).
O
O
O
C
is charged via R
and discharged via R
(R
>> R
) controlled by internal thresholds. The
O
O
E
O
E
oscillator frequency varies with the two operating modes by switching oscillator thresholds.
IRD drives an IR–LED via an external PNP transistor. If no external transistor is used, a pull–up
resistor has to be connected.
Proximity mode (P/B = low):
When the ramp at pin FO reaches the upper threshold of comparator C, an emission pulse at pin
IRD and the discharging of capacitor C
is triggered. This negative pulse is dermined by the
O
discharging time of capacitor C
. Comparator D is not affected (output stays at high level) because
O
its thresholds are closer to the limits of the operating voltage than the thresholds of comparator C.
Barrier mode (P/B = high):
By setting the Pin A/B = high, the comparator C is disabled and the oscillator runs by means of
comparator D at a lower frequency. If there is no light pulse or it is too low, the capacitor C
is
O
discharged when the upper threshold of comparator D is reached. A valid recepted light pulse starts
the discharge of C
earlier thus synchronising the oscillator. The synchronisation frequency has as
O
an upper (proximity–frequency: f
) and a lower (barrier–frequency: 1.2 u f
) limit. If the
OP
OB
analog microelectronics
February 2005
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