k9k1g08u0m-ycb0 Samsung Semiconductor, Inc., k9k1g08u0m-ycb0 Datasheet - Page 2

• Manufacturer Part Number: k9k1g08u0m-ycb0
• Description: 128m X 8 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

128M x 8 Bit NAND Flash Memory
Features
K9K1G08U0M-YCB0, K9K1G08U0M-YIB0
CLE
ALE
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
NOTE : Connect all V
R/ B
Vcc
Vss
WE
WP
- Memory Cell Array : (128M + 4,096K)bit x 8bit
- Data Register : (512 + 16)bit x8bit multipled by eight planes
- Page Program : (512 + 16)Byte
- Block Erase : (16K + 512)Byte
- Random Access : 12 s(Max.)
- Serial Page Access : 50ns(Min.)
- Program time : 200 s(Typ.)
- Block Erase Time : 2ms(Typ.)
- Program/Erase Lockout During Power Transitions
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
- K9K1G08U0M-YCB0, K9K1G08U0M-YIB0 :
Pin Configuration
RE
CE
Voltage Supply : 2.7V~3.6V
Organization
Automatic Program and Erase
528-Byte Page Read Operation
Fast Write Cycle Time
Command/Address/Data Multiplexed I/O Port
Hardware Data Protection
Reliable CMOS Floating-Gate Technology
Command Register Operation
Intelligent Copy-Back Operation
Package :
Simultaneous Four Page/Block Program/Erase
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Do not leave V
CC
Standard Type
12mm x 20mm
48-pin TSOP1
CC
and V
or V
SS
SS
disconnected.
pins of each device to common power supply outputs.
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
N.C
N.C
N.C
N.C
I/O7
I/O6
I/O5
I/O4
N.C
N.C
N.C
Vcc
Vss
N.C
N.C
N.C
I/O3
I/O2
I/O1
I/O0
N.C
N.C
N.C
N.C
2
General Description
The K9K1G08U0M is a 128M(134,217,728)x8bit NAND Flash
Memory with a spare 4.096K(4,194,304)x8bit. Its NAND cell
provides the most cost-effective solution for the solid state
mass storage market. A program operation can be performed
in typical 200 s on the 528-byte page and an erase operation
can be performed in typical 2ms on a 16K-byte block. Data in
the page can be read out at 50ns cycle time per byte. The I/O
pins serve as the ports for address and data input/output as
well as command inputs. The on-chip write controller auto-
mates all program and erase functions including pulse repeti-
tion, where required, and internal verification and margining of
data. Even the write-intensive systems can take advantage of
the K9K1G08U0M’s extended reliability of 100K program/erase
cycles by providing ECC(Error Correcting Code) with real time
mapping-out algorithm. The K9K1G08U0M-YCB0/YIB0 is an
optimum solution for large nonvolatile storage applications such
as solid state file storage and other portable applications requir-
ing non-volatility.
Pin Description
Pin Name
I/O
0
CLE
ALE
V
N.C
WE
WP
R/B
V
CE
RE
~ I/O
CC
SS
7
Data Input/Outputs
Command Latch Enable
Address Latch Enable
Chip Enable
Read Enable
Write Enable
Write Protect
Ready/Busy output
Power(+2.7V~3.6V)
Ground
No Connection
FLASH MEMORY
Pin Function