gm76c256c Hynix Semiconductor, gm76c256c Datasheet - Page 2

• Manufacturer Part Number: gm76c256c
• Description: 32k X8 Bit 5.0v Low Power Cmos Slow Sram
• Manufacturer: Hynix Semiconductor

DESCRIPTION
The GM76C256C is a high-speed, low power and
32,786 X 8-bits CMOS Static Random Access
Memory
performance CMOS process technology. It is
suitable for use in low voltage operation and
battery back-up application. This device has a
data retention mode that guarantees data to
remain valid at the minimum power supply
voltage of 2.0 volt.
GM76C256C
GM76C256CE
Note 1. Current value is max.
PIN CONNECTION
I/O1
I/O2
I/O3
PIN DESCRIPTION
Rev 03 / Apr. 2000
A14
A12
Vss
A7
A6
A5
A4
A3
A2
A1
A0
/CS
/WE
/OE
A0 ~ A14
I/O1 ~ I/O8
Vcc
Vss
Product
Pin Name
No.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
PDIP
fabricated
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Voltage
(V)
5.0
5.0
Chip Select
Write Enable
Output Enable
Address Inputs
Data Input/Output
Power( 5.0V)
Ground
Vcc
/WE
A13
A8
A9
A11
/OE
A10
/CS
I/O8
I/O7
I/O6
I/O5
I/O4
Pin Function
using
I/O1
I/O2
I/O3
A14
A12
Vss
A7
A6
A5
A4
A3
A2
A1
A0
55/70/85
55/70/85
Speed
(ns)
10
11
12
13
14
1
2
3
4
5
6
7
8
9
SOP
Hynix's
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Current(mA)
Operation
high
Vcc
/WE
A8
A9
A11
/OE
A10
/CS
I/O8
I/O7
I/O6
I/O5
I/O4
A13
10
10
/WE
A11
A13
A14
A12
/OE
Vcc
A9
A8
A7
A6
A5
A4
A3
TSOP-I(Standard)
10
11
12
13
14
1
2
3
4
5
6
7
8
9
/CS
/WE
/OE
A14
FEATURES
Standby Current(uA)
A0
40
60
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Low power consumption
Battery backup(L/LL-part)
- 2.0V(min.) data retention
Standard pin configuration
- 28 pin 600mil PDIP
- 28 pin 330mil SOP
- 28 pin 8x13.4 mm TSOP-I
L
BLOCK DIAGRAM
(Standard)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LL
20
30
MEMORY ARRAY
A10
/CS
I/O7
I/O6
I/O5
I/O4
Vss
I/O3
I/O2
I/O1
A0
A1
A2
ROW DECODER
I/O8
512x512
GM76C256C Series
-25~85(Extended)
0~70(Normal)
Temperature
( C)
I/O1
I/O8
2