msm80c86a-10js Oki Semiconductor, msm80c86a-10js Datasheet - Page 14

• Manufacturer Part Number: msm80c86a-10js
• Description: 16-bit Cmos Microprocessor
• Manufacturer: Oki Semiconductor

¡ Semiconductor
Asynchronous Signal Recognition
Bus Lock Signal Timing (Maximum Mode Only)
Request/Grant Sequence Timing (Maximum Mode Only)
Hold/Hold Acknowledge Timing (Minimum Mode Only)
LOCK
CLK
AD
A
S
RD, CLOCK
BHE/S
19
2
, S
15
/S
1
- AD
6
, S
7
RQ/GT
NOTE: 1 The coprocessor may not drive the buses outside the region shown without risking contention.
- A
0
CLK
,
0
16
/S
Any CLK Cycle
t
AD
A
RD,
BHE/S
DT/R, WR, DEN
CLAV
19
3
t
CLGH
15
/S
6
- AD
7
- A
, M/IO
0
16
,
NMI
INTR
TEST
/S
HOLD
HLDA
≥ t
3
CLK
NOTE: 1 Setup requirements for asynchronous
,
MSM80C86A-10
CLCL
Signal
t
CLAV
Any CLK Cycle
CLK
Any CLK Cycle
Coprocessor
Pulse 1
signals only to guarantee recognition
at next CLK
MSM80C86A-10
RQ
t
t
CHGX
GVCH
t
HVCH
≥ 1 CLK Cycle
> 0 CLK Cycle
Pulse 2
80C86AGT
t
CLGL
t
INVCH
t
CLAZ
(See NOTE 1)
t
CLHAV
≥ t
Coprocessor
t
t
CLAZ
HVCH
CLCL
Reset
1 or 2 Cycles
CLK
t
V
CLGH
Reset Timing
CC
(See NOTE 1)
Coprocessor
MSM80C86A-10RS/GS/JS
t
Pulse 3
Coprocessor
Release
DVCL
t
CLHAV
≥ 50msec
≥ 4 CLK Cycles
t
CLDX
MSM80C86A-10
MSM80C86A-10
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