ymf740c ETC-unknow, ymf740c Datasheet - Page 40

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ymf740c

Manufacturer Part Number
ymf740c
Description
Ds-1l
Manufacturer
ETC-unknow
Datasheet

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YMF740C
4-3. PCI Interface
Note : Top = 0-70°C, PVDD=5.0±0.25 V, VDD5=5.0±0.25 V, VDD3=3.3±0.3 V, LVDD=3.3±0.3 V, C
PCICLK Cycle Time
PCICLK High Time
PCICLK Low Time
PCICLK Slew Rate
PCICLK to Signal Valid Delay
Float to Active Delay
Active to Float Delay
Input Setup Time to PCICLK
Input Hold Time for PCICLK
OUTPUT
Tri-State
OUTPUT
PCICLK
*10: This characteristic is applicable to REQ# and PCREQ# signal.
*11: This characteristic is applicable to GNT# and PCGNT# signal.
Item
(Fig.3, 4)
PCICLK
t
t
PON
PVAL
t
Symbol
t
PVAL(PTP)
Fig.4: PCI Bus Signals timing
t
PSU(PTP)
t
t
t
t
t
PHIGH
POFF
t
PLOW
t
PCYC
PVAL
POFF
t
PON
PSU
INPUT
PH
Fig.3: PCI Clock timing
-
t
PHIGH
(Bused signal)
(Point to Point)
(Bused signal)
*10 (Point to Point)
*11 (Point to Point)
-40-
Condition
t
PCYC
2.2 V
t
PLOW
1.5 V
t
PSU
Min.
0.8 V
30
11
11
10
12
1
2
2
2
7
0
1.5 V
-
1.5 V
t
PH
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
January 14, 1999
Max.
L
11
12
28
4
-
-
-
-
-
-
-
-
=50 pF
1.5 V
V/ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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