ymf744 ETC-unknow, ymf744 Datasheet - Page 19

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ymf744

Manufacturer Part Number
ymf744
Description
Ds-1s
Manufacturer
ETC-unknow
Datasheet

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YMF744B
b4................MIEN: MPU401 IRQ Enable
b5................I/O: I/O Address Aliasing Control
b[7:6] ..........SDMA: Sound Blaster DMA-8 Channel Select
b[10:8] ........SBIRQ: Sound Blaster IRQ Channel Select
b[13:11] ......MPUIRQ: MPU401 IRQ Channel Select
This bit enables the interrupt service of MPU401, when LAD is set to “0” and MEN is set to “1”.
MPU401 generates an interrupt signal when it receives any kind of MIDI data from the RXD pin.
This bit selects the number of bits to decode for the I/O address of each block.
These bits select the DMA channel for the Sound Blaster Pro block.
These bits select the interrupt channel for the Sound Blaster Pro block.
When MIEN is set to “1”, these bits select the interrupt channel for the MPU401 block.
Same interrupt channels can be assigned to SBIRQ and MPUIRQ.
“0”: The MPU401 block can not use the interrupt service.
“1”: The MPU401 block can use interrupt signals determined by the MPUIRQ bits.
“0”: 16-bit address decode
“1”: 10-bit address decode
“0”:
“1”:
“2”:
“3”:
“0”:
“1”:
“2”:
“3”:
“4”:
“5” - “7”:
“0”:
“1”:
“2”:
“3”:
“4”:
“5” - “7”:
DMA ch0
DMA ch1
reserved
DMA ch3
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
reserved.
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
reserved
(default)
(default)
(default)
(default)
-19-
February 3, 1999
(default)

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