ymf795 Yamatake Corporation, ymf795 Datasheet
ymf795
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ymf795 Summary of contents
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... Automobile sound Player-2 Outline YMF795 is a sound source LSI to reproduce high quality melody and effect sound for in-car product. Yamaha's original FM synthesizer embedded as a sound source can create various timbres, and also a sequencer embedded can simultaneously generate up to four sounds with four different timbres without giving load to the controller. ...
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... Contents ■General Description of YMF795 .................................................................................................................. 3 ■Block Description ......................................................................................................................................... 4 ■Pin Configuration.......................................................................................................................................... 5 ■Pin Description ............................................................................................................................................. 6 ■Block Diagram.............................................................................................................................................. 7 ■Register Map................................................................................................................................................. 8 ■Explanation of Registers............................................................................................................................... 9 □Musical score data register .................................................................................................................... 9 □Timbre data register............................................................................................................................. 14 □Other control data ................................................................................................................................ 17 ■Power-down control division diagram........................................................................................................ 21 ■Explanation of each bit ............................................................................................................................... 21 ■On Reset ..................................................................................................................................................... 24 ■Settings and Procedure required for a piece generation.............................................................................. 24 ■ ...
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... YMF795 ■General Description of YMF795 YMF795 is controlled through the serial interface. Internal configuration the LSI has is shown below. SDIN Serial SYNC interface SCLK Musical score data FIFO /IRQ 32word Data inputted to the serial interface is converted into the parallel data and transferred to each function block according to its index address ...
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... The block synthesizes and generates timbres according to settings. Four sounds can be generated at the same time. 6) D/A, volume, and amplifier blocks The output from the synthesizer is D/A-converted, and volume processing is performed. After that, the data is output from the speaker or the earphone output pin. YMF795 -4- ...
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... YMF795 ■Pin Configuration CLK_I <NC> SDIN SYNC SCLK <NC> AVSS VREF HPOUT EQ1 EQ2 EQ3 < 24-pin SSOP TOP VIEW > -5- TESTO /RST /TESTI /IRQ DVDD DVSS SPOUT2 SPOUT1 SPVSS SPVSS AVDD ...
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... Speaker output pin 2 Digital ground Digital power supply (+3.3 V) Connect 0.1 µF and 4.7 µF capacitors between this pin and digital ground pin. Interrupt signal output LSI test input pin (Be sure to connect to DVDD.) Hardware reset pin LSI TEST output pin (Be sure to use in no-connection) -6- YMF795 ...
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... YMF795 ■Block Diagram SCLK Register SYNC Serial I/F SDIN FIFO 16b×32w /IRQ /RST Concerning AIN signal inputted into equalizer circuit It is possible to make the analog mixing between synthesizer output and other analog source in the equalizer circuit and output the resulting sound through the speaker. ...
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... AP4 AP3 AP2 AP1 0 0 CLKSET Reserved (access prohibited) For LSI TEST(access prohibited) -8- YMF795 Description TI0 TK2 TK1 TK0 Note data TI0 Rest data VCH2 VCH1 VCH0 Timbre data (for 1 Operator) FL2 FL1 FL0 WAV ...
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... YMF795 ■Explanation of Registers The YMF795 has three types of control registers: musical score data, timbre data, and other control data. □Musical score data register $00h Musical score data The musical score data are written into the 32-word FIFO. There are two types of musical score data: note data and rest data ...
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... This bit is used to set ON/OFF of Vibrato function for each note: “0” for OFF and “1” for ON. The vibrato frequency is 6.4 Hz and the modulation depth is ±13.47 cent. Note that Vibrato function becomes OFF when VIB bit of timbre data ($10-2Fh) is “0.” Pitch -10- YMF795 ...
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... YMF795 TI3 - TI0 : Interval setting These bits are used to set the interval time before the processing of the next note and rest. The interval “48” represents the time for the whole note. TI [3: TK2 – TK0 : Note (sound length) designation These 3 bits are used to designate the note (sound length). Depending on the value of interval setting (TI3 - 0), the length varies as shown in the following table. The interval “ ...
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... The release time is hastened to stop the state, and then the state stopped is shifted to the attack rate state. The starting time deviation of both envelopes and phase caused by this deviation causes a change of timbre How to avoid this symptom: Be sure to observe “Try to pronounce under the condition that the release is completely stopped.” Timbre varies -12- YMF795 ...
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... YMF795 Default: 0000h Rest data Index b15 b14 b13 $00h CH1 - CH0 : Part setting Using CH1 or 0 bit, set the part of each rest. CH[1:0] 00b 01b 10b 11b TI3 - TI0 : Interval setting These bits are used to set the interval time before the processing of the next note and rest. ...
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... EGT SUS RR3 RR2 RR1 RR0 SL1 SL0 TL5 TL4 TL3 TL2 Multiplying factor for frequency X 1 -14- YMF795 DR3 DR2 DR1 DR0 AR3 AR2 TL1 TL0 WAV FL2 FL1 FL0 ...
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... YMF795 VIB : Vibrato This bit is used to set ON/OFF of vibrato function. “0” for OFF, “1” for ON. The vibrato frequency is 6.4 Hz and the modulation depth is ±13.47cent. EGT : Envelope waveform type This bit is used to select the type of the envelope waveform. “0” for the decaying sound and “1” for the sustained sound. ...
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... TL5 TL4 TL3 TL2 -24 - WAV π/16 π/ 8 π/ 4 π/ 2 -16- YMF795 SL0 -3 TL1 TL0 -1.5 -0. π 2π 4π ...
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... YMF795 □Other control data $30h Timbre allocation data One piece can be generated at the same time up to four parts, and timbre can be assigned for each part. The data is used by allocating four timbres out of eight timbres registered in the timbre data register to each part. ...
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... IRQE is the interrupt enable bit. “1” indicates Enable. b10 2.688 19.200 19.680 19.800 8.400 14.400 27.821 12.600 b10 -18- YMF795 CLKSEL IRQE IRQ point ...
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... YMF795 $35h Speaker volume control $36h FM volume control $37h Earphone output volume control Default: 0000h Index b15 b14 b13 b12 $35- These bits are used to set the volume of each source. The volume setting consists of 31 steps and MUTE state, and can be set in 1dB steps ...
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... CLKSET = 3000 / 447.443 × about 54 = 000110110b And, actual clock frequency to be set is as follows. Clock frequency [kHz × 447.443 / 8 = 3020.24[kHz] = 3.02024[MHz] b11 b10 Clock frequency(MHz) (Preset mode) Prohibition : : Prohibition 2.684658000 2.740588375 : : 27.797396375 27.853326750 Prohibition : : Prohibition -20- YMF795 CLKSET ...
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... YMF795 ■Power-down control division diagram Power-down of the LSI can be controlled for each divided internal function. The power-down is controlled by Index 38h. SCLK Register RAM SYNC Serial I/F SDIN FIFO 16b × 32w /IRQ /RST ■Explanation of each bit DP0 This is the bit to power off the whole digital section. ...
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... Analog power supply can be powered off only when sound generation is being stopped. Be sure to set AP1 to AP4 to “1” before powering off the analog power supply. Or, pop noise may occur. Register functions Musical score data Timbre data Timbre allocation Tempo data IRQ Control -22- YMF795 ...
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... YMF795 Example of the setting in each case. Depending on how the function is used, bit settings can be combined as shown below. Analog section whole power-down Use of only earphone output. Use of only speaker. AP1 AP2 AP3 AP4 sure to set all volumes to “MUTE” first, then set all bits to “ ...
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... Clock frequency setting can be made in the programmable mode by setting a value to $39h. In this case, set $33h to “000b.” Operation is not guaranteed if other value is set. A value that can be set to $39h is “000000000b” and “000110000b” to “111110010b.” Operation is not guaranteed if other value is set. YMF795 -24- ...
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... YMF795 ■On Interrupt Sequence An interrupt from LSI (/IRQ-“L”) occurs when the amount of data in the FIFO becomes less than the setting value. For example, supposing that 10h (16b) is set to the IRQ point of $34h, the FIFO becomes full before starting a piece as described in “ ...
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... Transition The figure shown below is a state transition diagram of the YMF795. Analog PowerON Power Off Analog PowerDown mode Digital PowerDown mode Sequence to turn the power supply on. A way to turn the analog side power on after turning the digital side power on to initialize the hardware is ideal. If the analog power supply is turned on before the hardware is initialized, noise may be generated ...
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... YMF795 Description of each state Digital Power ON Ready This is a state before turning on the digital power supply. Hardware Reset Input the hardware reset to the LSI in conjunction with the power-on of the digital power supply. Analog Power ON Ready This is a state before turning on the analog power supply. Turn on the analog power supply after the initialization of the digital section ...
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... FIFO. 6) When reproducing the next data block step 3). To stop the reproduction set ST to “0.” Then, the data counter of FIFO will be cleared and the state returns to a state of step 1). YMF795 -28- ...
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... IRQ# CLK On /RST pin A schmitt circuit is not used for /RST pin in this device; therefore, please design a board in consideration of noise to the /RST line. Amp. EQ1 SCLK EQ2 SYNC SDIN EQ3 YMF795 SPOUT1 /RST /IRQ SPOUT2 AVDD CLK_I AVSS SPVSS +3.3V 0.1uF 4.7uF 0.1uF ...
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... Circuit diagram and wiring diagram when one power supply and one voltage regulator IC are used:” In each case, grounds must not be separated. (1) Circuit diagram and wiring diagram when two power supplies are used: ・Be sure to connect VSS pin to AVSS pin near the LSI. Excessive inductance between VSS pin and AVSS pin may cause malfunctions and failures. YMF795 -30- ...
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... YMF795 (2) Circuit diagram and wiring diagram when one power supply and one voltage regulator IC are used: ・Be sure to connect VSS pin to AVSS pin near the LSI. Excessive inductance between VSS pin and AVSS pin may cause malfunctions and failures. ・Connect the ground pin of the voltage regulator IC used for analog circuits near AVSS pin to prevent influence of digital circuit's current change. ・ ...
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... Therefore also necessary to take measures based on the assumption of these part failures. Moreover, consider the followings as well. - Design the board so that speaker amplifier output is not short-circuited easily even if foreign body or solder bridge is present. - Warning to customers of risk that may be caused by a short circuit of the speaker amplifier output. YMF795 -32- ...
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... YMF795 ■Volume level Adjustment in monophonic sound and 4-sound generation The volume level outputted from DAC varies depending on the number of the pronunciation. When one tone (*) is output from the FM sound source, output voltage amplitude from DAC becomes 0.4125 Vp-p. When multiple sounds are pronounced at the same time, output voltage amplitude varies depending on phase of each waveform, but when the waveforms with the same phase are overlapped, it becomes 0 ...
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... Therefore, the same Gain settings as that of monophonic sound can be made but if distortion of its sound is a little significant, turn down the Gain of EQ amplifier or adjust the FM and/or SP volume. A level adjustment of HPOUT Adjust the GAIN outside the LSI to increase Gain of the HPOUT side. YMF795 -34- ...
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... YMF795 ■Sound Quality Correction Circuit Sound quality and Gain can be corrected by using an external circuit connected to EQ1 to 3 pins. The internal circuit configuration of EQ1 to 3 pin and example of the external circuit are as follows. AIN EQ1 Gain and filter characteristic can be controlled by a value of C1, C2, R1, and R2. ...
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... Using a resister R3 can obtain the following frequency characteristic. EQ1 FM VOL Gain1= (R2+R3) /R1. Gain2=R3/R1. Filter cutoff frequency of f1 and f2 is: f1=1/ (2π×R1×C1). f2=1/ (2π×R2×C2). Gain Gain1 Gain1-3dB Gain2 EQ2 - + VREF f1 f2 -36- YMF795 R3 EQ3 Freq ...
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... Index Data (8bit) YMF795 is controlled by the three serial interface lines of SCLK, SYNC, and SDIN. Relation between SDIN and SCLK The LSI takes in the value of SDIN at the rising edge of SCLK. Input the SDIN so that Setup/Hold time is assured with respect to the rising edge of SCLK. ...
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... Typ. AVDD 3.0 DVDD 3.0 T -40 OP Symbol Condition Min. 0.7 × DVDD -1mA 0.8 × DVDD OUT 1mA - OL OUT Vsh IL -10 CI -38- YMF795 Max. Unit 4.6 V 4.6 V AVDD+0.3 V DVDD+0.3 V 125 °C Max. Unit 3.3 3.6 V 3.3 3 °C Typ. Max. Unit - - 0.2 × DVDD - - - - 0 ...
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... YMF795 4. AC characteristics Conditions: Input signal Timing measurement at V 4-1. CLK_I ,Reset Parameter CLK_I clock period CLK_I “L” pulse width CLK_I “H” pulse width /RST active “L” pulse width SCLK start delay time (after /RST inactive) Note) T =-40 to 85°C, DVDD=3.3±0.3V, Capacitor load=50pF OP “ ...
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... SYNC delay time SYNC “L” pulse width SYNC → SCLK setup time SDIN setup time SDIN hold time SDIN rise time SDIN fall time Note) T =-40 to 85°C, DVDD=3.3±0.3V, Capacitor load=50pF OP YMF795 Symbol Min. Typ. 430 Tsclk_period 200 Tsclk_low 200 Tsclk_high ...
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... YMF795 5. Power consumption Parameter ormal operation Digital part in n sound generation Analog part without , Analog part at output 300mW In power-down mode Note) T =-40 to 85°C, DVDD= AVDD = 3.3±0.3V, Capacitor load=50pF OP 6. Analog characteristics SP Amplifier Parameter Gain setting (fixed) Minimum resister load (RL) ...
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... Full-scale analog output (*1) THD+N (f= 1kHz) Noise level without signal (f=400Hz to 20kHz) Frequency characteristic (f=50Hz to 20kHz) Note) T =25°C, DVDD = AVDD = 3.3V OP *1: When four FM tones are simultaneously generated in the same phase. *2: Degradation of high-frequency response due to aperture effect. YMF795 Min Typ Max - ...
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... YMF795 ■General description of FM sound generator “FM” stands for Frequency Modulation. The FM sound generator utilizes the higher harmonic wave produced by the frequency modulation for synthesis of the musical sounds With the use of this FM system enables a comparatively simple circuit to produce such waveform that has a harmonic wave including disharmonious sounds possible to create a wide range of sounds from the synthesized sounds of the natural musical instruments to the electronic sounds ...
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... YMF795 -44- ...
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... YMF795 ...