74AHC08D,118 NXP Semiconductors, 74AHC08D,118 Datasheet
74AHC08D,118
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74AHC08D-T
935262678118
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74AHC08D,118 Summary of contents
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Quad 2-input AND gate Rev. 03 — 14 November 2007 1. General description The 74AHC08; 74AHCT08 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC ...
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... NXP Semiconductors 4. Functional diagram mna222 Fig 1. Logic symbol 5. Pinning information 5.1 Pinning GND 001aac945 Fig 4. Pin configuration SO14 and TSSOP14 74AHC_AHCT08_3 Product data sheet 74AHC08; 74AHCT08 1 & & & & mna223 Fig 2. IEC logic symbol index area (1) The die substrate is attached to this pad using conductive die attach material ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin GND Functional description [1] Table 3. Function selection Input [ HIGH voltage level LOW voltage level don’t care 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter P total power dissipation tot SO14 package TSSOP14 package DHVQFN14 package [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. ...
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... NXP Semiconductors Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level output voltage 4.0 mA 8.0 mA input leakage GND current to 5 supply current GND 5 input I capacitance For type 74AHCT08 V HIGH-level input voltage V LOW-level 5.5 V ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; For test circuit see Figure Symbol Parameter Conditions For type 74AHC08 t propagation nA nY; see pd delay power pF dissipation V = GND capacitance For type 74AHCT08 t propagation nA nY; see pd delay power pF dissipation V = GND to V ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. The input (nA, nB) to output (nY) propagation delays Table 8. Measurement points Type 74AHC08 74AHCT08 74AHC_AHCT08_3 Product data sheet nA, nB input M GND t PHL ...
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... NXP Semiconductors negative positive PULSE GENERATOR Test data is given in Table 9. Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 7. Load circuit for switching times Table 9. Test data ...
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... NXP Semiconductors 12. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 0.019 inches 0.069 0.01 0.004 0.049 0.014 Note 1 ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A (1) UNIT max. 0.05 0.30 3 0.2 0.00 0.18 2.9 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Document ID Release date 74AHC_AHCT08_3 20071114 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section • Section • ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 Revision history ...