ax88783lf ASIX Electronics Corporation, ax88783lf Datasheet - Page 48

• Manufacturer Part Number: ax88783lf
• Description: 2-port 10/100m Fast Ethernet Controller
• Manufacturer: ASIX Electronics Corporation

6.5.4 MII Interface Timing
TXEN / TXD[3:0]
TXCLK: Port 0 and Port 1 MII Transmit clock. (MII0_TX_CLK, MII1_TX_CLK)
TXD:
TXEN: Port 0 and Port 1 MII Transmit Enable (MII0_TX_EN, MII1_TX_EN)
RXDV / RXD[3:0]
RXCLK: Port 0 and Port 1 MII Receive clock. (MII0_RX_CLK, MII1_RX_CLK)
RXD:
RXDV: Port 0 and Port 1 MII Receive Data Valid (MII0_RX_DV, MII1_RX_DV)
*1: For 10Mbps, the typical value of Ttclk and Trclk shall scale to 400ns.
*2: For 10Mbps, the typical value of Ttch, Ttcl, Trch, and Trcl shall scale to 200ns.
Symbol
Symbol
Ttclk
Trclk
Trch
Ttch
Ttcl
Trcl
Trh
Tth
Trs
Tts
TXCLK
RXCLK
Port 0 and Port 1 MII TX Data bus include MII0_TXD0, MII0_TXD1, MII0_TXD2, MII0_TXD3,
Port 0 and Port 1 MII RX Data bus include MII0_RXD0, MII0_RXD1, MII0_RXD2, MII0_RXD3,
MII1_TXD0, MII1_TXD1, MII1_TXD2, and MII1_TXD3.
MII1_RXD0, MII1_RXD1, MII1_RXD2, and MII1_RXD3.
RXCLK clock low time *2
RXD [3:0], RXDV hold from rising TXCLK
TXCLK clock cycle time *1
TXCLK clock high time *2
TXCLK clock low time *2
TXD [3:0], TXEN setup to rising TXCLK
TXD [3:0], TXEN hold from rising TXCLK
RXCLK clock cycle time *1
RXCLK clock high time *2
RXD [3:0], RXDV setup to rising RXCLK
Ttch
Ttch
Trch
Trch
Ttcl
Ttcl
Description
Description
Trcl
Trcl
Ttcl k
Ttcl k
Tts
Trs
Trclk
Trclk
48
Min
Min
23.0
7.0
5.0
3.5
-
-
-
-
-
-
2-Port 10/100M Fast Ethernet Controller
ASIX ELECTRONICS CORPORATION
Tth
40.0
20.0
20.0
40.0
20.0
20.0
Typ
Typ
-
-
-
-
Trh
Max
Max
-
-
-
-
-
-
-
-
-
-
Non-PCI 8/16/32-Bit
AX88782/AX88783
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns