ld7522 Leadtrend Technology, ld7522 Datasheet - Page 11

• Manufacturer Part Number: ld7522
• Description: Smart Green-mode Pwm Controller With Multiple Protections
• Manufacturer: Leadtrend Technology

pin of LD7522.
UC384X, is with 2 diodes voltage offset then feeding into the
voltage divider with 1/3 ratio, that is,
A pull-high resistor is embedded internally thus can be
eliminated on the external circuit.
Dual-Oscillator Green-Mode Operation
There are many different topologies has been implemented
in different chips for the green-mode or power saving
requirements such as “burst-mode control”, “skipping-cycle
mode”, “variable off-time control “…etc. The basic operation
theory of all these approaches intended to reduce the
switching cycles under light-load or no-load condition either
by skipping some switching pulses or reduce the switching
frequency.
By using this dual-oscillator control, the green-mode
frequency can be well controlled and further to avoid the
generation of audible noise.
Internal Slope Compensation
A fundamental issue of current mode control is the stability
problem when its duty-cycle is operated more than 50%. To
stabilize the control loop, the slope compensation is needed
in the traditional UC384X design by injecting the ramp signal
from the RT/CT pin through a coupling capacitor. In LD7522,
the
implemented to simplify the external circuit design.
Current Sensing, Leading-edge Blanking
The typical current mode PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. The LD7522 detects the primary
MOSFET current from the CS pin, which is not only for the
peak current mode control but also for the pulse-by-pulse
current limit. The maximum voltage threshold of the current
sensing pin is set as 0.85V. Thus the MOSFET peak current
can be calculated as:
Leadtrend Technology Corporation
LD7522-DS-03 January 2008
internal
I
PEAK
V
+
(
PWM
(
MAX
slope
COMPARATOR
)
=
The input stage of LD7522, like the
(
. 0
compensation
85
−
V
)
LINE
=
1
3
×
_
R
(
COMPENSATI
V
S
COMP
circuit
www.leadtrend.com.tw
−
2
V
has
F
ON
)
)
been
11
A 350nS leading-edge blanking (LEB) time is included in the
input of CS pin to prevent the false-trigger from the current
spike. However, the total pulse width of the turn-on spike is
decided by the output power, circuit design and PCB layout.
It is strongly recommended to adopt a smaller R-C filter (as
shown in figure 21) to avoid the CS pin being damaged by
the negative turn-on spike.
Brownout Protection & Line Compensation
BNO pin plays 2 different roles in LD7522. The major
function is to set the brownout protection point, and at the
same time, it also provides the line compensation function
like in LD7520.
Since the voltage on the BNO pin is proportional to the bulk
capacitor voltage thus represented the line voltage.
brownout comparator is implemented to detect the abnormal
line condition then shutdown the controller to prevent the
damage. Figure 22 shows the operation. When V
lower than 1.25V, the gate output will be kept off even the
Vcc already achieves UVLO(on), therefore the Vcc will be
hiccup between UVLO(on) and UVLO(off). Until the line
voltage is higher enough so that V
the gate output will start switching when the next UVLO(on)
is tripped. A hysteresis is implemented to prevent the false
trigger during turn-on and turn-off.
Fig. 21
BNO
LD7522
is higher than 1.25V,
BNO
is
A