kac-9617 ETC-unknow, kac-9617 Datasheet - Page 29

• Manufacturer Part Number: kac-9617
• Description: Kodak Kac-9617 Cmos Image Sensor
• Manufacturer: ETC-unknow

IMAGE SENSOR SOLUTIONS
Register Set
Register Name Main Configuration 1
Address
Mnemonic
Type
Reset Value
www.kodak.com/go/imagers 585-722-4385
7
6
5
4
3
2
1:0
Bit
ColorMode
ScanMode
HSubSamEn
VSubSamEn
SlaveMode
Bit Symbol
03 Hex
MCFG1
Read/Write
00 Hex
(continued)
Set when using a monochrome
sensor. When this bit is at a
logic 1, Sub-Sampling is set to
2:1 and every other row is read
out during interlace readout-
mode. Clear (the default) when
using a color sensor. When this
bit is at logic 0, sub-sampling is
set to 4:2 and every other row
pair is read out during interlace
mode.
Set to configure the sensor to
operate in interlace readout
mode. Clear (the default) to set
the sensor to operate in pro-
gressive scan read out mode.
Set to enable horizontal sub-
sampling. Clear (the default) to
disable horizontal sub-sampling.
NOTE: When horizontal sub-
sampling is enabled Pclk is
divided by 2. The Hsync active
time is the same in both sub-
sampled and non sub-sampled
mode. Therefore frame rate
does not increase with horizon-
tal sub-sampling.
Assert to enable vertical sub-
sampling. Clear (the default) to
disable vertical sub-sampling.
Reserved
Use to configure the digital
video port’s synchronisation sig-
nal to operate in slave mode. By
default the digital video’s port’s
synchronization signals are con-
figured to operate in master
mode.
Reserved
Description
29
Register Name Power Control Register 1
Address
Mnemonic
Type
Reset Value
Register Name Hclk Generator Register
Address
Mnemonic
Type
Reset Value
7:4
3
2:1
0
7:6
5
4:0
Bit
Bit
PwdnCGA
PwdnPGA
[1:0]
PwDnADC
Bit Symbol
PumpClkGen
HclkGen
Bit Symbol
04 Hex
PCR
Read/Write
00 Hex
05 Hex
VCLKGEN
Read/Write
04 Hex.
Reserved
Assert to power down the pro-
grammable video gain amplifier.
Clear (the default) to power up the
video gain amplifiers.
Assert (11) to power down the pro-
grammable color gain amplifiers.
Clear (00, the default) to power up
the analog gain amplifiers.
Assert to power down the 12 bit
analog to digital convertor. Clear
(the default) to power up the 12 bit
analog to digital convertor.
Use to divide the frequency of
the sensors master clock input,
mclk to generate the internal
charge pump clock, PumpClk as
shown in the table below.
Reserved
Use to divide the frequency of
the sensors master clock input,
mclk to generate the internal
sensor clock, Hclk.
Program 00 Hex (the default) for
Hclk to equal mclk or divide
mclk by any number between 1
and 31.
00
01
10
11
PumpClk = mclk
PumpClk = mclk/2
PumpClk = mclk/4
PumpClk = mclk/8
Email:[e-mail]
Description
Description