imp8980d A1 PROs co., Ltd., imp8980d Datasheet
imp8980d
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imp8980d Summary of contents
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... The microprocessor can write to the IMP8980D to establish switched connec- tions between input ST-BUS channels and output ST-BUS channels or to transmit messages on output ST-BUS channels. By reading from the IMP8980D, the micro- processor can receive messages from ST-BUS input channels or check which C4i V ...
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... The Connection Memory High determines whether individual output channels are in Message Mode, and allows individual output channels to go into a high- impedance state, which enables arrays of IMP8980D constructed. It also controls the CSTo pin. All ST-BUS timing is derived from the C4i and F0i signals. Software Control ...
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Message Mode; i.e., the contents of the Connection Memory Low are output on the ST-BUS output streams once every frame unless the ODE pin is low. In this mode the chip behaves as if bits 2 and ...
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... ST-BUS output is monitored by a microprocessor (not shown) through an ST-BUS input on the bottom IMP8980D. Figure 8 shows how a simple digital switching system may be designed using the ST-BUS architecture. This is a private telephone network with 256 extensions which uses a single IMP8980D as a speech 0 IMP8980D DS-5-00 ...
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... IMP8980D for communication with the line interface circuits. A larger digital switching system may be designed by cascading a number of IMP8980Ds. Figure 9 shows four IMP8980Ds arranged in a non-blocking configuration which can switch any channel on any of the ST-BUS inputs to any channel on the ST-BUS outputs. ...
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... Line Interface Circuit with Codec (e.g. 8964) 8980 #1 STi0/7 STo0/7 8980 #2 STi0/7 STo0/7 8980 #3 STi0/7 STo0/7 8980 #4 STi0/7 STo0/7 MT9964 Line Divider Filter/Codec and Wire Signalling Converter Logic Line Repeated for Lines 2 to 255 Line 256 OUT 0/7 OUT 8/15 IMP8980D DS-5-00 ...
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Figure 10 Application Circuit D7-D0 A15-A0 MEK6802D3 R/W System MR VMA E 1 DTA 2 STi0 3 STi1 4 STi2 909Ω 5 STi3 1/4W 6 STi4 7 STi5 5V 8 STi6 IMP 9 STi7 5V 10 VDD 8980 11 F0i ...
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... Sourcing. V =2. Sinking 0.4V OL µA V between V and open circuit except when testing output levels or high impedance states switched to VDD or VSS when testing output levels or high impedance states. IMP8980D DS-5- ...
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AC Electrical Characteristics † - Clock Timing (Figures 12 and 13) Characteristics 1 Clock Period* 2 Clock Width High 3 Clock Width Low 4 Clock Transition Time 5 Frame Pulse Setup TIme 6 Frame Pulse Hold Time 7 Frame Pulse ...
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... STo0 to 0.8V STo7 t XCD Units Test Conditions KΩ*, C =150 =150 =150 =150 KΩ*, C =150 =150 =150 OED OED Bit Cell Boundaries t SIH t SIS IMP8980D DS-5- ...
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AC Electrical Characteristics † - Processor Bus (Figures 11 and 17) Characteristics 1 Chip Select Setup Time 2 Read/Write Setup Time 3 Address Setup Time 4 A cknowledgement Fast Delay Slow 5 Fast Write Data Setup Time 6 Slow Write ...
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... NB: Even when ODE is high, channels on the STo0-STo7 outputs can go high impedance under software control. CSTo Control ST-BUS Output (Complementary Output). Each frame of 256 bits on this ST-BUS output contains the values of bit 1 in the 256 locations of the Connection Memory High Connection. IMP8980D DS-5-00 ...
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... Figure 2 Pin Connections STi3 STi4 STi5 STi6 STi7 VDD F0i C4i Ordering Information Ordering Part Number IMP8980DC IMP8980DE IMP8980DP IMP8980DP Pin PLCC DTA 1 40 CSTo STi0 2 39 ODE STi1 3 38 STo0 STi2 4 37 STo1 ...
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... ISO 9001 Registered IMP, Inc. http://www.impweb.com 14 © IMP, Inc. IMP8980D DS-5-00 ...