UPD444012AGY-B10X-MJH NEC [NEC], UPD444012AGY-B10X-MJH Datasheet - Page 14
UPD444012AGY-B10X-MJH
Manufacturer Part Number
UPD444012AGY-B10X-MJH
Description
4M-BIT CMOS STATIC RAM 256K-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION
Manufacturer
NEC [NEC]
Datasheet
1.UPD444012AGY-B10X-MJH.pdf
(24 pages)
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Write Cycle Timing Chart 3 (CE2 Controlled)
Cautions 1. During address transition, at least one of pins /CE1, CE2, /WE should be inactivated.
Remark
14
/LB, /UB (Input)
Address (Input)
2. Do not input data to the I/O pins while they are in the output state.
Write operation is done during the overlap time of a low level /CE1, /WE, /LB and/or /UB, and a high level
CE2.
/CE1 (Input)
CE2 (Input)
/WE (Input)
I/O (Input)
High impedance
t
AS
Data Sheet M14464EJ5V0DS
t
AW
t
WC
t
t
t
CW1
WP
BW
t
CW2
t
DW
Data in
t
t
WR
DH
PD444012A-X
impedance
High
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