DS1045 DALLAS [Dallas Semiconductor], DS1045 Datasheet - Page 6

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DS1045

Manufacturer Part Number
DS1045
Description
4-Bit Dual Programmable Delay Line
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet

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TIMING DIAGRAM: DS1045 INPUTS TO OUTPUTS
TERMINOLOGY
PERIOD: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V on the leading edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of the output pulse.
t
pulse and the 1.5V point on the trailing edge of the output pulse.
NOTES:
1. All voltages are referenced to ground.
2. @ V
WI
RISE
FALL
PLH
PHL
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the 1.5V
Table 1.
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
CC
= 5V and 25°C. Delay accurate on both rising and falling edges within tolerances given in
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DS1045

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