DS1100L-100 DALLAS [Dallas Semiconductor], DS1100L-100 Datasheet

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DS1100L-100

Manufacturer Part Number
DS1100L-100
Description
3.3V 5-Tap Economy Timing Element Delay Line
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS1100L-100
Manufacturer:
MAXIM/美信
Quantity:
20 000
DESCRIPTION
The DS1100L is a 3.3V version of the DS1100. It is characterized for operation over the range 3.0V to
3.6V. The DS1100L series delay lines have five equally spaced taps providing delays from 4ns to 500ns.
These devices are offered in surface-mount packages to save PC board area. Low cost and superior
reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and
industry-standard µSOP and SO packaging. The DS1100L 5-tap silicon delay line reproduces the input-
logic state at the output after a fixed delay as specified by the extension of the part number after the dash.
The DS1100L is designed to reproduce both leading and trailing edges with equal precision. Each tap is
capable of driving up to ten 74LS loads.
Dallas Semiconductor can customize standard products to meet special needs.
FEATURES
§ All-Silicon Timing Circuit
§ Five Taps Equally Spaced
§ Delays are Stable and Precise
§ Both Leading- and Trailing-Edge Accuracy
§ 3.3V Version of the DS1100
§ Low-Power CMOS
§ TTL-/CMOS-compatible
§ Vapor-Phase and IR Solderable
§ Custom Delays Available
§ Fast-Turn Prototypes
§ Delays Specified Over Both Commercial and
www.maxim-ic.com
Industrial Temperature Ranges
1 of 6
PIN ASSIGNMENT
PIN DESCRIPTION
TAP 1 to TAP 5
V
GND
IN
CC
TAP 2
TAP 4
GND
IN
3.3V 5-Tap Economy Timing
DS1100LZ SO (150mil)
DS1100LU µSOP
1
2
3
4
Element (Delay Line)
- TAP Output Number
- +3.3V
- Ground
- Input
8
7
6
5
DS1100L
V
TAP 1
TAP 3
TAP 5
CC
091201

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DS1100L-100 Summary of contents

Page 1

... Industrial Temperature Ranges DESCRIPTION The DS1100L is a 3.3V version of the DS1100 characterized for operation over the range 3.0V to 3.6V. The DS1100L series delay lines have five equally spaced taps providing delays from 4ns to 500ns. These devices are offered in surface-mount packages to save PC board area. Low cost and superior reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and industry-standard µ ...

Page 2

... Figure 1. LOGIC DIAGRAM . Table 1. DS1100L PART NUMBER DELAY TABLE (All Values in ns) PART DS1100L-XXX TAP 1 -20 4 -25 5 -30 6 -35 7 -40 8 -45 9 -50 10 -60 12 -75 15 -100 20 -125 25 -150 30 -175 35 -200 40 -250 50 -300 60 -500 100 Figure 2. TIMING DIAGRAM: SILICON DELAY LINE NOMINAL DELAYS ...

Page 3

ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature Short-Circuit Output Current *This is a stress rating only and functional operation of the device at these or any other conditions above ...

Page 4

NOTES: 1) Initial tolerances are ± with respect to the nominal value at +25°C and V and trailing edge. 2) Temperature and voltage tolerance is with respect to the nominal delay value over the stated temperature range, and a supply-voltage ...

Page 5

... TEST SETUP DESCRIPTION Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1100L. The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter (20ps resolution) connected between the input and each tap ...

Page 6

... ORDERING INFORMATION DS1100L TOTAL TIME DELAY (ns): 20, 25, 30, 35, 40, 45, 50, 60, 75, 100, 125, 150, 175, 200, 250, 300, 500 PACKAGE TYPE (150MIL µSOP ...

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