gl845 Genesys Logic, gl845 Datasheet - Page 31

• Manufacturer Part Number: gl845
• Description: High Speed Usb 2.0 2-in-1 Scanner Controller With Adf
• Manufacturer: Genesys Logic

©2000-2007 Genesys Logic Inc. - All rights reserved.
Offset 0Bh …………………………………………..…………..……..………. Default value = 8’h00
Offset 0Ch …………………………………………..…………..……..………. Default value = 8’h00
Offset 0Dh
7-5 CLKSET [2:0] To select the system clock frequency.
7-4 Reserved
2-0 DRAMSEL [2:0] Select the SDRAM size.
3-0 CCDLMT [3:0] To set the lines count which is synchronized for CCD timing(like NEC8884).
CLKSET2
4 RFHDIS
3 ENBDRAM
Command: Scanner command.
7 Reserved
3 SEND
2 CLRMCNT
6 SCSYNC
5 CLRERR
4 FULLSTP
R/W
X
X
X
X
GL845 High Speed USB2.0 2-in-1 Scanner Controller With ADF
CLKSET1
SCSYNC
R/W
W
X
X
To reset steps type to full step.
To clear FEDCNT(Reg48,Reg49,Reg4A) counter information.
00 2400bps.
01 4800bps.
10 9600bps.
11 19200bps.
000 24MHz.
001 30MHz.
010 40MHz.
011 48MHz.
100 60MHz.
101 Reserved.
110 Reserved.
111 Reserved.
0 Enable auto-refresh mode for SDRAM.
1 Enable self-refresh mode for SDRAM.
A rising edge from low to high: to start power on sequence of SDRAM.
000 Reserved.
001 16M bits.
010 64M bist.
011 128M bits.
100 256M bits.
101 512M bits.
110
111 Reserved.
-
-
To send the RS232 data.
To synchronize base-clock and pixel-count for two chips operation
Reserved
CLKSET0
CLRERR
1G
R/W
W
X
X
bits.
FULLSTP
RFHDIS
R/W
W
X
X
ENBDRAM DRAMSEL2 DRAMSEL1 DRAMSEL0
CCDLMT3
SEND
R/W
R/W
W
CCDLMT2 CCDLMT1 CCDLMT0
CLRMCNT
R/W
R/W
W
CLRDOCJM
R/W
R/W
W
CLRLNCNT
Page 31
R/W
R/W
W