DS1977-F5 DALLAS [Dallas Semiconductor], DS1977-F5 Datasheet
DS1977-F5
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DS1977-F5 Summary of contents
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... Maintenance and Inspection of equipment Medical Information / Health Data Shuttle for Fleet Management and Vending applications Ordering Information Part Temp Range DS1977-F5 - 32KB EEPROM iButton Features 32KB EEPROM memory Durable, stainless-steel iButton package Built-in multi-drop controller ensures compatibility with other Dallas Semiconductor ...
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... ROM ID field Like all 1-Wire devices, the DS1977 has a 64-bit lasered ROM identification field. The Family code of the DS1977 in the 64-bit ROM assigned. Figure 1. 64-BIT LASERED ROM MSB 8-Bit CRC Code MSB LSB MSB Figure 2. Command Hierarchy 1-Wire net BUS ...
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... If passwords are enabled (EPW = AAh, see Password Control Register), the 64-bit data pattern that the 1-Wire master has to transmit with the command flow is compared to the passwords stored in the DS1977 iButton. If the password matches, access is granted. ...
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... ONLY) Address Registers and Transfer Status Because of the serial data transfer, the DS1977 iButton employs three address registers, called TA1, TA2 and E/S (Figure ??). Registers TA1 and TA2 must be loaded with the target address to which the data will be written or from which data will be sent to the 1-Wire master upon a Read command ...
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... TA1, TA2 and E/S. The 1-Wire master may obtain the contents of these registers by reading the scratchpad or derive it from the target address and the amount of data to be written. As soon as the DS1977 iButton has received these bytes correctly and the 1-Wire master has provided an acceptable password, the DS1977 will copy the scratchpad data to the requested location beginning at the target address ...
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... The memory address range of the DS1977 iButton is 0000h to 7FFFh (see Figure ??). There is no user-access to the address range 7FD1h to 7FFFh. If the 1-Wire master sends a target address higher than this, the internal circuitry of the chip will set the most significant address bit to zero shifted into the internal address register ...
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... If the match is successful safe to again enable passwords. Read Version Command [CCh] This command allows the 1-Wire master to read the chip revision code of the DS1977. After issuing the command code, the master sends two 00h-bytes to access the version register. With the next 16 time slots the master receives two copies of the content of the version register. ...
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... From ROM Functions Flow Chart (Figure 17 Master RX Ending DS1977 sets Scratchpad Offset with Data Offset = (T5:T3,0,0,0) and Clears (PF, AA, T2:T0) DS1977 sets Scratch- Master TX one or both pad Offset = (T5:T0) 8-byte passwords Master RX Data Byte from Scratchpad Offset Y DS1977 Incre- ments Scratch- pad Offset ...
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... Copy Scrpad. [w/PW] Y Master TX Authorization Code Master TX E/S Byte Master TX 64-Bits [Password] Master Activates Strong Pull-up N Password Accepted Authorization Code Match Address of Password Power Fail? N DS1977 TX "0" Y Master TX Reset? N DS1977 TX "1" Master TX Reset? Y Master RX "1"s N Master TX Reset? Y 1/31/03 ...
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... DS1977 Decision made by Master Master TX Reset Page 10 69h N Read Mem. [w/PW] Y Master TX TA1 (T7:T0), TA2 (T15:T8) Master TX 64-Bits [Password] DS1977 sets Memory Address = (T15:T0) Master Activates Strong Pull-up N Password Accepted Master RX Data Byte from Memory Address or FFh if Password Address DS1977 Incre- Y Master ...
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... Figure 5-4. Memory Function Flow Chart, Part 4 Page 11 C3h N Verify Password Y Master TX TA1 (T7:T0), TA2 (T15:T8) N Address of Password? Y DS1977 sets Memory Address = (T15:T3 Master TX Password to verify Master Activates Strong Pull-up N Password Match? Y Master RX AAh byte N Master TX Reset? Y Master RX FFh byte N Master TX Reset? ...
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... Pulse? Y DS1977 TX Presence Pulse F0h N Search ROM Command ? Y RC=0 DS1977 TX Bit 0 DS1977 TX Bit 0 Bus Master TX Bit 0 Bit 0 N Match? Y DS1977 TX Bit 1 DS1977 TX Bit 1 Bus Master TX Bit 1 N Bit 1 Match? Y DS1977 TX Bit 63 DS1977 TX Bit 63 Bus Master TX Bit 63 N Bit 63 Match RC=1 Y RFA CCh ...
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Figure 6-2. ROM Function Flow Chart, Part 2 All data is LSB first RFA A5h N Resume RFB Command ? Y N RC= Bus Master TX Reset Y To Memory Function Flow Chart Page 13 3Ch 69h Overdrive ...
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... ILMAX RESISTOR Figure 10. Read-data Time Slot PUP V IHMASTER ILMAX RESISTOR Page 14 t MSP t PDL t PDH t RSTH MASTER t SLOT MASTER MASTER t MSR Master Sampling Window t SLOT MASTER t REC DS1977 DS1977 t REC t SLOT DS1977 t REC DS1977 1/31/03 ...
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ABSOLUTE MAXIMUM RATINGS IO Voltage to GND Operating Temperature Range Storage Temperature Range ELECTRICAL CHARACTERISTICS (V = 2.8V to 5.25V PUP CC PUP PARAMETER SYMBOL Standby Supply Current I CC Ground Current I GND (system requirement) IO pin ...
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PARAMETER SYMBOL Write-1 Low Time (Note t W1L 11) (system requirement) IO pin, 1-Wire Read Read Low Time (Note t RL 12) (system requirement) Read-0 Low t SPD (data from slave) Read Sample Time (Note t MSR 12) (system requirement) ...