DS1986-F3 DALLAS [Dallas Semiconductor], DS1986-F3 Datasheet
DS1986-F3
Related parts for DS1986-F3
DS1986-F3 Summary of contents
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... Reduces control, address, data, power, and programming signals to a single data pin § 8-bit family code specifies DS1986 communications requirements to reader § Reads over a wide voltage range of 2.8V to 6.0V from -40°C to +85°C; programs at 11.5V to 12.0V from -40° ...
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... ORDERING INFORMATION DS1986-F3 F3 MicroCan DS1986-F5 F5 MicroCan iButton DESCRIPTION The DS1986 64-kbit Add-Only iButton is a rugged read/write data carrier that identifies and stores relevant information about the product or person to which it is attached. This information can be accessed with minimal hardware, for example a single port pin of a microcontroller. The DS1986 consists of a factory-lasered registration number that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit Family Code (0Fh) plus 64 kbit of EPROM which is user-programmable ...
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... Figure 5. All data is read and written least significant bit first. 64-BIT LASERED ROM Each DS1986 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See Figure 3.) The 64-bit ROM and ROM Function Control section allow the DS1986 to operate as a 1-Wire device and follow the 1-Wire protocol detailed in the section “ ...
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... DS1986 BLOCK DIAGRAM Figure ...
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... MSB 65536-BITS EPROM The memory map in Figure 4 shows the 65536-bit EPROM section of the DS1986 which is configured as 256 pages of 32 bytes each. The 8-bit scratchpad is an additional register that acts as a buffer when programming the memory. Data is first written to the scratchpad and then verified by reading an 16-bit CRC from the DS1986 that confirms proper receipt of the data and address ...
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... EPROM STATUS BYTES In addition to the 65536 bits of data memory the DS1986 provides 2816 bits of Status Memory accessible with separate commands. The EPROM Status Bytes can be read or programmed to indicate various conditions to the software interrogating the DS1986. The first 32 bytes of the EPROM Status Memory (addresses 000 to 01FH) contain the Write Protect Page bits which inhibit programming of the corresponding page in the 65536-bit main memory area if the appropriate write protection bit is programmed ...
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... The “Memory Function Flow Chart” (Figure 5) describes the protocols necessary for accessing the various data fields within the DS1986. The Memory Function Control section, 8-bit scratchpad, and the Program Voltage Detect circuit combine to interpret the commands issued by the bus master and create the correct control signals within the device ...
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... To execute a read sequence, the starting address is issued by the bus master and data is read from the part beginning at that initial location and continuing to the end of the selected data field or until a reset sequence is issued. All bits transferred to the DS1986 and received back by the bus master are sent least significant bit first. ...
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MEMORY FUNCTION FLOW CHART Figure 5 1), 2) SEE NEXT PAGE ...
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MEMORY FUNCTION FLOW CHART Figure 5 (cont transmitted or received at Overdrive Speed if OD=1; 2) Reset Pulse to be transmitted at Overdrive Speed if OD=1; Reset Pulse to be transmitted at Regular Speed if OD=0 or ...
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MEMORY FUNCTION FLOW CHART Figure 5 (cont.) 1), 2) SEE PREVIOUS PAGE ...
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... Multiplying the page number by 32 (20H) results in the new address the master has to send to the DS1986 to read the updated data replacing the old data. There is no logical limitation in the number of redirections of any page. The only limit is the number of available memory pages within the DS1986. In addition to page redirection, the Extended Read Memory command also supports “ ...
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... CRC that is the result of clearing the CRC generator and then shifting in the Redirection Byte only. After the 16-bit CRC of the last page is read, the bus master will receive logical 1s from the DS1986 until a Reset Pulse is issued. The Extended Read Memory command sequence can be exited at any point by issuing a Reset Pulse ...
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... Write Status command, but skips sending the CRC immediately preceding the program pulse. This command should only be used if the electrical contact between bus master and the DS1986 is firm since a poor contact may result in corrupted data inside the EPROM status memory. ...
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... The presence pulse lets the bus master know that the DS1986 is on the bus and is ready to operate. For more details, see the “1-Wire Signaling” section. ...
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... This command allows the bus master to read the DS1986’s 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can be used only if there is a single DS1986 on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired-AND result) ...
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... DS1986 EQUIVALENT CIRCUIT Figure 6 BUS MASTER CIRCUIT Figure 7 DATA 5 µA TYP CAPACITOR ADDED TO REDUCE COUPLING ON DATA LINE DUE TO PROGRAMMING SIGNAL SWITCHING VP0300L OR VP0106N3 OR BSS110 TO DATA CONNECTION OF DS1986 ...
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ROM FUNCTIONS FLOW CHART Figure transmitted or received at Overdrive Speed if OD=1 2) The Presence Pulse will be short if OD ...
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ROM FUNCTIONS FLOW CHART Figure 8 (cont.) FROM FIGURE 8 FIRST PART TO FIGURE 8 FIRST PART 3) Always to be transmitted at Overdrive Speed ...
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... Overdrive Speed). A Reset Pulse of 480 µs or longer will exit the Overdrive Mode returning the device to regular speed. If the DS1986 is in Overdrive Mode and the Reset Pulse is no longer than 80 µs the device will remain in Overdrive Mode. ...
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... DS1986. During write time slots, the delay circuit determines when the DS1986 will sample the data line. For a read data time slot “0” transmitted, the delay circuit determines how long the DS1986 will hold the data line low overriding the 1 generated by the master. If the data bit is a “ ...
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... READ/WRITE TIMING DIAGRAM Figure 10 Write-one Time Slot RESISTOR MASTER DS1986 Write-zero Time Slot Regular Speed 60 µs ≤ t < 120 µs SLOT µs ≤ t < 15 µs 1 LOW1 µs ≤ t < ∞ 1 REC Regular Speed 60 µs ≤ t <120 µs < t LOW0 SLOT 1 µs ≤ t < ...
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... ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within the DS1986 to determine if the ROM data has been received error-free by the bus master. The equivalent polynomial ...
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... There is no circuitry on the DS1986 that prevents a command sequence from proceeding if the CRC stored in or calculated by the DS1986 does not match the value generated by the bus master. For more details on generating CRC values including example implementations in both hardware and software, see the Book of DS19xx iButton Standards ...
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CRC–16 HARDWARE DESCRIPTION AND POLYNOMIAL Figure POLYNOMIAL = ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Storage Temperature ∗ This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operation sections ...
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AC ELECTRICAL CHARACTERISTICS OVERDRIVE SPEED PARAMETER Time Slot Write 1 Low Time Write 0 Low Time Read Data Valid Release Time Read Data Setup Recovery Time Reset Time High Reset Time Low Presence Detect High Presence Detect Low NOTES: 1. ...