UPD784218 NEC [NEC], UPD784218 Datasheet
UPD784218
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UPD784218 Summary of contents
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SINGLE-CHIP MICROCONTROLLERS DESCRIPTION The PD784218 is a member of the PD784218 Subseries of the 78K/IV Series. In addition to a high-speed and high-performance CPU, the PD784218 incorporates a variety of peripheral hardware such as ROM, RAM, I/O ports, 8-bit ...
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APPLICATIONS Cellular phones, personal handy phone system (PHS), cordless telephones, CD-ROM, AV equipment ORDERING INFORMATION Part Number PD784218GC- -8EU 100-pin plastic LQFP (fine pitch) (14 PD784218GF- -3BA 100-pin plastic QFP (14 Note PD784218YGC- -8EU 100-pin plastic LQFP (fine pitch) (14 ...
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SERIES LINEUP : Under mass production : Under development Standard models PD784026 Enhanced A/D converter, 16-bit timer, and power management ASSP models PD784956A For DC inverter control PD784908 TM On-chip IEBus controller PD784915 Software servo control On-chip analog circuit ...
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OVERVIEW OF FUNCTIONS (1/2) Part Number Item Number of basic instructions 113 (mnemonics) General-purpose registers 8 bits Minimum instruction execution • 160 ns/320 ns/640 ns/1,280 ns/2,560 time • Internal ROM 256 KB memory ...
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OVERVIEW OF FUNCTIONS (2/2) Part Number Item Clock output Selectable from f Buzzer output Selectable from f Watch timer 1 channel Watchdog timer 1 channel Standby • HALT/STOP/IDLE modes • In low-power consumption mode (with subsystem clock): HALT/IDLE mode Interrupts ...
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DIFFERENCES AMONG MODELS IN PD784218, 784218Y SUBSERIES ............................... 2. DIFFERENCES BETWEEN PD784218 AND PD784216 .......................................................... 3. MAJOR DIFFERENCES FROM PD78078, 78078Y SUBSERIES .............................................. 4. PIN CONFIGURATION (TOP VIEW) .............................................................................................. 10 5. BLOCK DIAGRAM .......................................................................................................................... 13 6. PIN FUNCTIONS ............................................................................................................................. ...
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LOCAL BUS INTERFACE .............................................................................................................. 51 10.1 Memory Expansion .............................................................................................................. 52 10.2 Programmable Wait ............................................................................................................. 52 10.3 External Access Status Function ...................................................................................... 52 11. STANDBY FUNCTION ..................................................................................................................... 53 12. RESET FUNCTION.......................................................................................................................... 55 13. ROM CORRECTION ....................................................................................................................... 56 14. INSTRUCTION SET ...
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DIFFERENCES AMONG MODELS IN PD784218, 784218Y SUBSERIES The PD784218Y is the PD784218 with I The PD78F4218 and 78F4218Y are provided with a 256 KB flash memory instead of the mask ROM of the above models. These differences are summarized ...
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MAJOR DIFFERENCES FROM PD78078, 78078Y SUBSERIES Series Name Item CPU Minimum instruction With main execution time system clock With subsystem clock Memory space I/O ports Total CMOS input CMOS I/O N-ch open-drain I/O Pins with ancillary Pins with pull-up ...
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PIN CONFIGURATION (TOP VIEW) • 100-pin plastic LQFP (fine pitch) (14 PD784218GC- -8EU, 784218YGC- 100 P120/RTP0 2 P121/RTP1 3 P122/RTP2 4 P123/RTP3 5 P124/RTP4 6 P125/RTP5 7 P126/RTP6 8 P127/RTP7 ...
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QFP (14 20 mm) PD784218GF- -3BA, 784218YGF- 100 P60/A16 2 P61/A17 3 P62/A18 4 P63/A19 5 P64/RD 6 P65/WR 7 P66/WAIT 8 P67/ASTB P100/TI5/TO5 11 P101/TI6/TO6 12 P102/TI7/TO7 ...
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A0 to A19: Address Bus AD0 to AD7: Address/Data Bus ANI0 to ANI7: Analog Input ANO0, ANO1: Analog Output ASCK1, ASCK2 Asynchronous Serial Clock ASTB: Address Strobe AV : Analog Power Supply Analog Reference Voltage ...
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BLOCK DIAGRAM INTP2/NMI Programmable interrupt INTP0, INTP1, controller INTP3 to INTP6 TI00 Timer/event counter TI01 (16 bits) TO0 Timer/event TI1 counter 1 TO1 (8 bits) Timer/event TI2 counter 2 TO2 (8 bits) Timer/event counter 5 TI5/TO5 (8 bits) Timer/event ...
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PIN FUNCTIONS 6.1 Port Pins (1/2) Pin Name I/O Alternate Function P00 I/O INTP0 P01 INTP1 P02 INTP2/NMI P03 INTP3 P04 INTP4 P05 INTP5 P06 INTP6 P10 to P17 Input ANI0 to ANI7 P20 I/O RxD1/SI1 P21 TxD1/SO1 P22 ...
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Port Pins (2/2) Pin Name I/O Alternate Function P60 I/O A16 P61 A17 P62 A18 P63 A19 P64 RD P65 WR P66 WAIT P67 ASTB P70 I/O RxD2/SI2 P71 TxD2/SO2 P72 ASCK2/SCK2 P80 to P87 I ...
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Non-Port Pins (1/2) Pin Name I/O Alternate Function TI00 Input P35 TI01 P36 TI1 P33 TI2 P34 TI5 P100/TO5 TI6 P101/TO6 TI7 P102/TO7 TI8 P103/TO8 TO0 Output P30 TO1 P31 TO2 P32 TO5 P100/TI5 TO6 P101/TI6 TO7 P102/TI7 TO8 ...
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Non-Port Pins (2/2) Pin Name I/O Alternate Function NMI Input P02/INTP2 INTP0 P00 INTP1 P01 INTP2 P02/NMI INTP3 P03 INTP4 P04 INTP5 P05 INTP6 P06 PCL Output P23 BUZ Output P24 RTP0 to RTP7 Output P120 to P127 AD0 ...
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Pin I/O Circuits and Recommended Connections of Unused Pins The input/output circuit type of each pin and recommended connections of unused pins are shown in Table 6- 1. For the input/output circuit configuration of each type, refer to Figure ...
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Table 6-1. Types of Pin Input/Output Circuits and Recommended Connections of Unused Pins (2/2) Pin Name I/O Circuit Type P130/ANO0, P131/ANO1 12-F RESET 2-G XT1 16 XT2 AV — REF0 AV REF1 TEST Remark Because the ...
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Figure 6-1. Types of Pin I/O Circuits (1/2) Type 2-G IN Schmitt trigger input with hysteresis characteristics Type 5-A Pullup enable V DD Data P-ch Output N-ch disable Input enable Type 8-N Pullup enable V DD Data P-ch Output N-ch ...
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Figure 6-1. Types of Pin I/O Circuits (2/2) Type 12 Data P-ch Output N-ch disable V SS P-ch Input enable Analog output voltage N- Type 13-D Data N-ch Output disable P-ch Middle-voltage input ...
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CPU ARCHITECTURE 7.1 Memory Space A memory space can be accessed. Mapping of the internal data area (special function registers and internal RAM) can be specified by the LOCATION instruction. The LOCATION instruction must always be ...
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On execution of LOCATION 0H instruction Note 1 External memory (768 KB Internal ROM (196,608 bytes ...
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CPU Registers 7.2.1 General-purpose registers Sixteen 8-bit general-purpose registers are available. Two 8-bit registers can be also used in pairs as a 16-bit register. Of the 16-bit registers, four can be used in combination with an 8-bit register for ...
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Control registers (1) Program counter (PC) The program counter is a 20-bit register whose contents are automatically updated when the program is executed. Figure 7-3. Program Counter (PC) Format 19 PC (2) Program status word (PSW) This register holds ...
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Special function registers (SFRs) The special function registers, such as the mode registers and control registers of the internal peripheral hardware, are registers to which special functions are allocated. These registers are mapped to the 256-byte space of addresses ...
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Table 7-1. Special Function Register (SFR) List (1/4) Note 1 Address Special Function Register (SFR) Name 0FF00H Port 0 0FF01H Port 1 0FF02H Port 2 0FF03H Port 3 0FF04H Port 4 0FF05H Port 5 0FF06H Port 6 0FF07H Port 7 ...
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Table 7-1. Special Function Register (SFR) List (2/4) Note Address Special Function Register (SFR) Name 0FF30H Pull-up resistor option register 0 0FF32H Pull-up resistor option register 2 0FF33H Pull-up resistor option register 3 0FF37H Pull-up resistor option register 7 0FF38H ...
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Table 7-1. Special Function Register (SFR) List (3/4) Note 1 Address Special Function Register (SFR) Name 0FF74H Transmit shift register 1 Receive buffer register 1 0FF75H Transmit shift register 2 Receive buffer register 2 0FF76H Baud rate generator control register ...
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Table 7-1. Special Function Register (SFR) List (4/4) Note 1 Address Special Function Register (SFR) Name 0FFB4H Slave address register 2 Note 2 0FFB6H I C bus status register 0FFB8H Serial shift register 0FFC0H Standby control register 0FFC2H Watchdog timer ...
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PERIPHERAL HARDWARE FUNCTION FEATURES 8.1 Ports The ports shown in Figure 8-1 are provided to make various control operations possible. Table 8-1 shows the function of each port. Ports 0, 2 through 8, 10, and 12 can be connected ...
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Port Name Pin Name Port 0 P00 to P06 • Can be set in input or output mode in 1-bit units Port 1 P10 to P17 • Input port Port 2 P20 to P27 • Can be set in input ...
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Figure 8-3. Example of Using Main System Clock Oscillator (1) Crystal/ceramic oscillation Crystal resonator or ceramic resonator Figure 8-4. Example of Using Subsystem Clock Oscillator (1) Crystal oscillation V SS XT2 32.768 kHz XT1 Caution When ...
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Real-Time Output Port The real-time output function is to transfer data preset in the real-time output buffer register to the output latch as soon as the timer interrupt or external interrupt has occurred in order to output the data ...
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Timer/Event Counter One unit of 16-bit timer/event counters and six units of 8-bit timer/event counters are provided. Because a total of eight interrupt requests are supported, these timer/event counters can be used as eight units of timers/counters. Table 8-2. ...
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Figure 8-6. Block Diagram of Timer/Event Counters 16-bit timer/event counter /16 XX INTTM3 Edge detector TI01 TI00 Edge detector 8-bit timer/event counter ...
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A/D Converter An A/D converter converts an analog input variable into a digital signal. This microcontroller is provided with an A/D converter with a resolution of 8 bits and 8 channels (ANI0 through ANI7). This A/D converter is of ...
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D/A Converter A D/A converter converts an input digital signal into an analog voltage. This microcontroller is provided with a voltage output type D/A converter with a resolution of 8 bits and two channels. The conversion method is of ...
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Serial Interfaces Three independent serial interface channels are provided. • Asynchronous serial interface (UART)/3-wire serial I/O (IOE) • Clocked serial interface (CSI) 1 3-wire serial I/O (IOE) • bus interface ( PD784218Y Subseries ...
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Asynchronous serial interface/3-wire serial I/O (UART/IOE) Two channels of serial interfaces for which an asynchronous serial interface mode and 3-wire serial I/O mode can be selected are provided. (1) Asynchronous serial interface mode In this mode, data of 1 ...
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I/O mode In this mode, the master device starts transfer by making the serial clock active and transfers 1-byte data in synchronization with this clock. This mode is used to communicate with a device having the conventional ...
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Clocked serial interface (CSI) In this mode, the master device starts transfer by making the serial clock active and transfers 1-byte data in synchronization with this clock. (1) 3-wire serial I/O mode This mode is to communicate with devices ...
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Figure 8-13. Block Diagram Direction controller SDA0 register 0 (SIO0) SCL0 8.8 Clock Output Function Clocks of the following frequencies can be output as clock output. • 97.7 kHz/195 kHz/391 kHz/781 kHz/1.56 MHz/3.13 MHz/6.25 MHz/12.5 MHz (@ ...
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Buzzer Output Function Clocks of the following frequencies can be output as buzzer output. • 1.5 kHz/3.1 kHz/6.1 kHz/12.2 kHz (@ 12.5 MHz operation with main system clock) Figure 8-15. Block Diagram of Buzzer Output Function ...
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Figure 8-16. Watch Timer Block Diagram Prescaler 8.12 Watchdog Timer A watchdog timer is provided to detect a CPU runaway. ...
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INTERRUPT FUNCTION The three types of servicing in response to an interrupt request shown in Table 9-1 can be selected by program. Table 9-1. Servicing of Interrupt Request Servicing Mode Servicing Means Vectored interrupt Software Context switching Macro service ...
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Table 9-2. Interrupt Sources (2/2) Type Default Priority Name Maskable 10 INTSR1 INTCSI1 11 INTST1 12 INTSER2 13 INTSR2 INTCSI2 14 INTST2 15 INTTM3 16 INTTM00 17 INTTM01 18 INTTM1 19 INTTM2 20 INTAD 21 INTTM5 22 INTTM6 23 INTTM7 ...
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Vectored Interrupt Execution branches to a servicing routine by using the memory contents of a vector table address corresponding to the interrupt source as the address of the branch destination. So that the CPU performs interrupt servicing, the following ...
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Context Switching When an interrupt request is generated or when the BRKCS instruction is executed, a predetermined register bank is selected by hardware. Context switching is a function that branches execution to a vector address stored in advance in ...
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Application Example of Macro Service (1) Serial interface transmission TxD1, TxD2 Each time macro service requests INTST1 and INTST2 are generated, the next transmit data is transferred from memory to TXS1 and TXS2. When data n (last byte) has ...
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LOCAL BUS INTERFACE The local bus interface can connect an external memory or I/O (memory mapped I/O) and support a memory space (refer to Figure 10-1). Figure 10-1. Example of Local Bus Interface V PD784218 RD ...
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Memory Expansion External program memory and data memory can be connected in two stages: 256 KB and 1 MB. To connect the external memory, ports 4 through 6 and port 8 are used. The external memory can be connected ...
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STANDBY FUNCTION This function is to reduce the power consumption of the chip, and can be used in the following modes: • HALT mode: • IDLE mode: • STOP mode: • Low power consumption mode: • Low power consumption ...
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Figure 11-1. Standby Function State Transition Low Low power consumption HALT mode set power consumption HALT mode (Standby) Interrupt request for masked interrupt Interrupt request for STOP IDLE masked (Standby) interrupt (Standby) Notes 1. Only unmasked interrupt requests 2. Only ...
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RESET FUNCTION When a low-level signal is input to the RESET pin, the system is reset, and each hardware unit is initialized (reset). During the reset period, oscillation of the main system clock is unconditionally stopped. Consequently, the current ...
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ROM CORRECTION ROM correction is a function for avoiding execution of a part of a program in the internal ROM that needs to be corrected by executing the corrected program, which is stored in the internal RAM. By using ...
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INSTRUCTION SET (1) 8-bit instructions (The instructions in parentheses are combinations realized by describing MOV, XCH, ADD, ADDC, SUB, SUBC, AND, OR, XOR, CMP, MULU, DIVUW, INC, DEC, ROR, ROL, RORC, ROLC, SHR, SHL, ROR4, ROL4, ...
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AX as rp) MOVW, XCHW, ADDW, SUBW, CMPW, MULUW, MULW, DIVUX, INCW, DECW, SHRW, SHLW, PUSH, POP, ADDWG, SUBWG, PUSHU, POPU, MOVTBLW, MACW, MACSW, SACW Table 14-2. Instruction ...
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WHL as rg) MOVG, ADDG, SUBG, INCG, DECG, PUSH, POP Table 14-3. Instruction List by 24-Bit Addressing Second Operand #imm24 WHL First Operand WHL (MOVG) (MOVG) (ADDG) (ADDG) ...
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Bit manipulation instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR, BFSET Table 14-4. Instruction List by Bit Manipulation Instruction Addressing Second Operand CY First Operand CY saddr.bit MOV1 sfr.bit A.bit X.bit PSWL.bit PSWH.bit mem2.bit !addr16.bit !!addr24.bit ...
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Call and return/branch instructions CALL, CALLF, CALLT, BRK, RET, RETI, RETB, RETCS, RETCSB, BRKCS, BR, BNZ, BNE, BZ, BE, BNC, BNL, BC, BL, BNV, BPO, BV, BPE, BP, BN, BLT, BGE, BLE, BGT, BNH, BH, BF, BT, BTCLR, BFSET, ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Supply voltage A/D converter reference voltage input REF0 AV D/A converter reference voltage input REF1 Input voltage V Other than ...
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Operating Conditions • Operating ambient temperature (T • Power supply voltage and clock cycle time: see Figure 15-1 Figure 15-1. Power Supply Voltage and Clock Cycle Time 600 500 400 320 300 200 160 100 CAPACITANCE ...
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Main System Clock Oscillator Characteristics (T Resonator Recommended Circuit Parameter Ceramic Oscillation resonator frequency ( crystal resonator External X1 input frequency clock ( input high-/low- level width (t PD74HCU04 X1 ...
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Subsystem Clock Oscillator Characteristics (T Resonator Recommended Circuit Parameter Crystal Oscillation V XT2 XT1 resonator frequency (f SS Oscillation stabilization time External XT1 input XT2 XT1 clock frequency (f XT1 input high-/low- PD74HCU04 level width (t Note Time required to ...
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DC Characteristics (T = – Parameter Symbol Input voltage, low V IL1 V IL2 V IL3 V IL4 V IL5 V IL6 Input voltage, high V IH1 V IH2 V IH3 V IH4 V IH5 ...
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DC Characteristics (T = – Parameter Symbol Supply current I DD1 I DD2 I DD3 I DD4 I DD5 I DD6 Data retention voltage V DDDR Data retention current I DDDR Pull-up resistor R L ...
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AC Characteristics (T = – (1) Read/write operation (1/2) Parameter Symbol Cycle time t CYK Address setup time (to ASTB ) t SAST Address hold time (from ASTB ) t HSTLA ASTB high-level width t ...
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AC Characteristics (1) Read/write operation (2/2) Parameter Symbol Data output delay time WR t DWOD Delay time from ASTB DSTW Data setup time ( SODWR Data hold time (from HWOD ASTB ...
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AC Characteristics (2) External wait timing Parameter Symbol Input time from address to t DAWT WAIT Input time from ASTB to t DSTWT WAIT Hold time from ASTB to t HSTWT WAIT Delay time from ASTB to t DSTWTH WAIT ...
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Serial Operation (T = – (a) 3-wire serial I/O mode (SCK: internal clock output) Parameter Symbol SCK cycle time t KCY1 SCK high-/low-level width t , KH1 t KL1 SI setup time (to SCK ) ...
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I C bus mode ( PD784218Y only) Parameter Symbol SCL0 clock frequency f CLK Bus free time (between stop t BUF and start conditions) Note1 Hold time STA Low-level width of SCL0 clock t LOW ...
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Other Operations (T = – Parameter Symbol NMI high-/low-level width t WNIL t WNIH INTP input high-/low-level width t WITL t WITH RESET high-/low-level width t WRSL t WRSH Clock Output Operation (T = –40 ...
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A/D Converter Characteristics (T = – Parameter Symbol Resolution Note Overall error Conversion time t CONV Sampling time t SAMP Analog input voltage V IAN Reference voltage AV REF0 Resistance between AV and AV R ...
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Data Retention Characteristics (T = – Parameter Symbol Data retention voltage V DDDR Data retention current I DDDR V rise time t DD RVD V fall time t DD FVD V hold time t DD ...
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Timing Waveforms (1) Read operation (CLK (Output A19 (Output) Hi-Z Lower address AD0 to AD7 (Output) (Input/output) t SAST ASTB (Output) t WSTH RD (Output) t DAWT WAIT (Input) Remark Signals are output from A0 ...
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Write operation (CLK) t CYK (Output A19 (Output) Hi-Z Lower address AD0 to AD7 (Output) (Output) t SAST ASTB (Output) t WSTH WR (Output) t DAWT WAIT (Input) Remark Signals are output from A0 ...
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Serial Operation (1) 3-wire serial I/O mode SCK SI/SO (2) UART mode ASCK 2 ( bus mode ( PD784218Y Subseries only) t LOW t R SCL0 DAT STA SDA0 t BUF Stop ...
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Clock Output Timing CLKOUT t CLR Interrupt Input Timing NMI INTP0 to INTP6 Reset Input Timing RESET PD784218, 784218Y t t CLH CLL t CLF t CYCL t t WNIH WNIL t t WITH WITL t t WRSH WRSL Data ...
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Clock Timing XT1 Data Retention Characteristics STOP mode setting HVD FVD RESET NMI (Cleared by falling edge) NMI (Cleared by rising edge WXH WXL ...
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PACKAGE DRAWINGS 100-PIN PLASTIC LQFP (FINE PITCH) (14x14 100 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The external dimensions and ...
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PLASTIC QFP (14x20 100 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The external dimensions and material of the ES version are ...
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RECOMMENDED SOLDERING CONDITIONS The PD784218 should be soldered and mounted under the following recommended conditions. For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other ...
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APPENDIX A DEVELOPMENT TOOLS The following development tools are available for system development using the PD784218. Also refer to (5) Cautions on Using Development Tools. (1) Language Processing Software RA78K4 Assembler package common to 78K/IV Series CC78K4 C compiler package ...
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When IE-784000-R in-circuit emulator is used IE-784000-R In-circuit emulator common to 78K/IV Series IE-70000-98-IF-C Interface adapter used when PC-9800 series PC (except notebook type) is used as host machine (C bus supported) IE-70000-PC-IF-C Interface adapter when using IBM PC/AT ...
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Cautions on Using Development Tools • The ID78K4-NS, ID78K4, and SM78K4 are used in combination with the DF784218. • The CC78K4 and RX78K/IV are used in combination with the RA78K4 and DF784218. • The FL-PR2, FL-PR3, FA-100GF, FA-100GC, NP-100GF, ...
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APPENDIX B RELATED DOCUMENTS Documents Related to Devices Document Name PD784218, 784218Y Data Sheet PD78F4218, 78F4218Y Preliminary Product Information PD784218, 784218Y Subseries User’s Manual Hardware 78K/IV Series User’s Manual Instructions 78K/IV Series Instruction Table 78K/IV Series Instruction Set 78K/IV Series ...
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Documents Related to Embedded Software (User’s Manuals) Document Name 78K/IV Series Real-Time OS 78K/IV Series OS MK78K4 Other Related Documents Document Name SEMICONDUCTORS SELECTION GUIDE Products & Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades on NEC Semiconductor Devices ...
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PD784218, 784218Y Data Sheet U12304EJ2V0DS00 89 ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...
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The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without ...