VN16118L1 VAISH [Vaishali Semiconductor], VN16118L1 Datasheet - Page 8

• Manufacturer Part Number: VN16118L1
• Description: Gigabit Ethernet Transceiver
• Manufacturer: VAISH [Vaishali Semiconductor]

VN16118
Table 6. Transceiver Reference Clock Requirements
T
Table 7. Transmitter Timing Characteristics
T
Note:
1.
1999-12-15
A
f
F
Symm
A
t
t
t_txlat
Symbol
setup
hold
Symbol
= 0 C to +70 C, V
tol
= 0 C to +70 C, V
TX<9:0>
TX<9:0>
The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the
parallel data word (as triggered by the rising edge of the transmit by clock, REFCLK) and the
transmission of the first serial bit of that parallel word (defined by the rising edge of the first bit
transmitted).
TX_CLK
TX_CLK
Vaishali Semiconductor
[1]
TX<9:0>
TX_CLK
DOUT
Nominal Frequency (for gigabit Ethernet
Compliance)
Frequency Tolerance
Symmetry (Duty Cycle)
Setup Time to Rising Edge of REFCLK
Hold Time to Rising Edge of REFCLK
Transmitter Latency
T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5
CC
CC
DATA
DATA
= 3.15 V to 3.45 V
= 3.15 V to 3.45 V
l
t
t
SETUP
SETUP
747 Camden Avenue
Parameter
Figure 3. Transmitter Section
Timing
Parameter
DATA
DATA
Figure 4. Transmitter Latency
t
t
HOLD
HOLD
DATA BYTE B
l
DATA
DATA
Campbell
DATA BYTE A
Page 8
l
t_TXLAT
CA 95008
DATA
DATA
1.5
1.0
Min.
l
Ph. 408.379.2900
-100
40
Min.
3.5
4.4
DATA
DATA
Typ.
125
DATA BYTE B
Typ.
DATA BYTE C
l
Fax [phone]
DATA
DATA
Max.
+100
Max.
60
nsec
nsec
nsec
bits
1.4 V
1.4 V
2.0 V
2.0 V
0.8 V
0.8 V
MHz
ppm
%
1.4 V
Unit
Unit
Preliminary
MDSN-0001-00