STV-DCA/VGA-E01 STMICROELECTRONICS [STMicroelectronics], STV-DCA/VGA-E01 Datasheet - Page 18

• Manufacturer Part Number: STV-DCA/VGA-E01
• Description: Low Cost Digital Camera (LCDC) Chipset
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Digital Camera Chipset; Customer Datasheet, Rev 3.0, March 2000
4.
4.1
The STV0680A pinout has been carefully developed to minimise the physical size of the support printed circuit board by
facilitating placement of and electrical routing to peripheral support components such as the SDRAM. The complete pinout and
listing is shown in Section 8.
4.2
STV0680A uses a standard ST digital interface from the sensor, and the sensor clock input is provided by an output from
STV0680A. Designing a camera using this chipset should design as close as possible to the reference design (Section 9.), in
which case the chipset can be regarded as a functional ‘black box’, and no further details regarding the STV0680A-sensor
interface are required.
4.3
STV0680A is designed to interface to an external 16Mbit or 64Mbit SDRAM (see Table 4 and Table 5). The SDRAM device must
have a 16 bit wide data bus and operate from a 3.3V supply. Two sizes of SDRAM memory are supported by STV0680A, 16MBits
(1M x 16 bits wide) or 64MBits (4M x 16 bits wide), the memory size is auto-detected by STV0680A. STV0680A clocks the
SDRAM at 6MHz, typically this is well below the figures offered by most manufacturers’ devices. Devices which are PC66 and/or
PC100 compliant are preferred. For interface wiring, see Section 9.
4.3.1
For maximum system battery life while no pictures are being taken, and to assist in meeting requirements for USB compliance, an
SDRAM should be chosen with the lowest possible self refresh current specification. For suggested SDRAM part numbers, see
Section 9.
4.3.2
The following timing diagrams should be referred to when selecting SDRAM other than those recommended in Section 9.
STV0680F_contents.fm
Command
A0-9,BA
A10
DQM
DQ
DCLK
C KE
STV0680A hardware interfaces
STV0680A pinout
Sensor interface
Memory interface
SDRAM Current consumption
SDRAM interface timing requirements
t
t
t
CK
CMS
AS
ACTIVE
ROW
ROW
t
t
CMH
t
R C D
AH
t
CMS
t
L
READ
t
H
READ Latency
Commercial in confidence
CDSTV0680F-C
PRELIMINARY
t
A C
DOUT M
t
R A S
D Q sam ple
t
O H
COLUMN
NOP
DOUT M + 1
t
R C
D Q sam ple
t
CMH
DOUT M + 2
PRECHARGE
D Q sam ple
STV0680A + VV6444/6410/6500
DOUT M + 3
D Q sam ple
NOP
t
R P
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