v54c365324v ETC-unknow, v54c365324v Datasheet - Page 10

• Manufacturer Part Number: v54c365324v
• Description: 200/183/166/143 Volt Ultra High Performance Sdram Banks 512kbit
• Manufacturer: ETC-unknow

M O S E L V I T E L I C
AC Characteristics
T
V54C365324V Rev. 1.2 August 2001
Clock and Clock Enable
1
2
3
4
5
6
Setup and Hold Times
7
8
9
10
11
12
13
14
Common Parameters
15
16
17
18
19
20
21
22
Refresh Cycle
23
24
A
#
= 0 to 70 C; V
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CK
AC
CH
CL
T
CS
AS
DS
CKS
CH
AH
DH
CKH
RCD
RAS
RC
RP
RRD
CCD
RCS
SB
REF
SREX
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
Clock Frequency
CAS Latency = 3
CAS Latency = 2
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
Clock High Pulse Width
Clock Low Pulse Width
Transition time
Command Setup Time
Address Setup Time
Data In Setup Time
CKE Setup Time
Command Hold Time
Address Hold Time
Data In Hold Time
CKE Hold Time
Row to Column Delay Time
Row Active Time
Row Cycle Time
Row Precharge Time
Activate(a) to Activate(b) Command
period
CAS(a) to CAS(b) Command period
Mode Register Set-up time
Power Down Mode Entry Time
Refresh Period (2048 cycles)
Self Refresh Exit Time
SS
= 0 V; V
(1,2,3)
CC
= 3.3 V
0.3 V, t
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
2.5
2.5
1.5
10
15
40
60
15
10
10
5
–
–
–
–
1
2
2
2
2
1
1
1
1
0
–
T
-5
= 1 ns
100K
200
100
10
32
10
–
–
5
7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5
5.5
2.5
2.5
1.5
10
16
45
63
17
11
11
–
–
–
–
1
2
2
2
2
1
1
1
1
0
–
-55
100K
200
100
5.5
5.5
10
32
–
–
7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Limit Values
2 CLK + t
2.5
2.5
1.5
10
16
48
66
18
12
12
6
–
–
1
2
2
2
2
1
1
1
1
0
–
‘
-6
100K
166
100
10
32
–
–
6
7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
6
RC
2.5
2.5
1.5
10
16
48
70
21
14
14
7
–
–
–
–
1
2
2
2
2
1
1
1
1
0
–
-7
100K
143
100
10
32
–
–
6
7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
7
2.5
2.5
2.5
2.5
1.5
10
16
48
72
24
16
16
V54C365324V
8
–
–
–
–
3
3
1
1
1
1
1
0
–
-8
100K
125
100
10
32
–
–
6
7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
8
Unit
MHz
MHz
CLK
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
3
4
4
4
4
4
4
4
4
5
5
5
5
5
6