CS4340-BS CIRRUS [Cirrus Logic], CS4340-BS Datasheet - Page 20
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CS4340-BS
Manufacturer Part Number
CS4340-BS
Description
24-Bit, 96 kHz Stereo DAC for Audio?
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
1.CS4340-BS.pdf
(28 pages)
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SDATA
SDATA
LRCK
SCLK
Right Justified, 24-Bit Data
INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
Right Justified, 16-Bit Data
INT SCLK = 32 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
LRCK
SCLK
0
Internal SCLK Mode
Internal SCLK Mode
23 22 21 20 19 18
15 14 13 12 11 10
32 clocks
32 clocks
Left Channel
Left Channel
9 8 7
7
Figure 18. CS4340 Format 2
Figure 19. CS4340 Format 3
6 5 4 3 2 1 0
6 5 4 3 2 1 0
Right Justified, 24-Bit Data
Data Valid on Rising Edge of SCLK
SCLK Must Have at Least 48 Cycles per LRCK Period
Right Justified, 16-Bit Data
Data Valid on Rising Edge of SCLK
SCLK Must Have at Least 32 Cycles per LRCK Period
23 22 21 20 19 18
15 14 13 12 11 10
External SCLK Mode
External SCLK Mode
Right Channel
Right Channel
9 8 7
7
6 5 4 3 2 1 0
6 5 4 3 2 1 0
CS4340
DS297PP3