lc51024vg Lattice Semiconductor Corp., lc51024vg Datasheet - Page 3

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lc51024vg

Manufacturer Part Number
lc51024vg
Description
3.3v In-system Programmable Superbig, Superwide High Density Plds Tm Tm
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
and complement form for every product term. The three control product terms are used for shared reset, clock and
output enable functions.
AND-Array
The programmable AND-array consists of 68 inputs and 163 output product terms. The 68 inputs from the GRP are
used to form 136 lines in the AND-array (true and complement of the inputs). Each line in the array can be con-
nected to any of the 163 output product terms via a wired AND. Each of the 160 logic product terms feed the Dual-
OR Array with the remaining three control product terms feeding the Shared PT Clock, Shared PT Reset, and
Shared PT OE. Every set of five product terms from the 160 logic product terms forms a product term cluster start-
ing with PT0. There is one product term cluster for every macrocell in the GLB. In addition to the three control prod-
uct terms, the first, third, fourth and fifth product terms of each cluster can be used as a PTOE (output macrocells
only), PT Clock, PT Preset and PT Reset, respectively. Figure 2 is a graphical representation of the AND-Array.
Figure 2. ispMACH 5000B AND-Array
Dual-OR Array
There are two OR gates per macrocell in the GLB. These OR gates are referred to as the PTSA OR gate and the
PTSA-Bypass OR gate. The PTSA-Bypass OR gate receives its five inputs from the combination of product terms
associated with the product term cluster. The PTSA-Bypass OR gate feeds the macrocell directly for fast narrow
logic. The PTSA OR gate receives its inputs from the combination of product terms associated with the product
term cluster. Figure 3 shows the Dual-OR Array.
In[66]
In[67]
In[0]
Note:
Indicates programmable fuse.
3
PT0
PT1
PT2
PT3
PT4
PT155
PT156
PT157
PT158
PT159
PT162
ispMACH 5000B Family Data Sheet
PT160
PT161
Cluster 0
Shared OE
Cluster 31
Shared clock
Shared reset

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