h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 25

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
19.9 Program/Erase Protection ................................................................................................. 488
19.10 Programmer Mode ............................................................................................................ 489
19.11 Power-Down States for Flash Memory............................................................................. 489
19.12 Note on Switching from F-ZTAT Version to Masked ROM Version .............................. 490
Section 20 Clock Pulse Generator
20.1 Register Descriptions........................................................................................................ 492
20.2 Oscillator .......................................................................................................................... 494
20.3 PLL Circuit ....................................................................................................................... 497
20.4 Medium-Speed Clock Divider .......................................................................................... 497
20.5 Bus Master Clock Selection Circuit.................................................................................. 497
20.6 Usage Notes ...................................................................................................................... 498
Section 21 Power-Down Modes
21.1 Register Descriptions........................................................................................................ 504
21.2 Medium-Speed Mode ....................................................................................................... 507
21.3 Sleep Mode ....................................................................................................................... 508
21.4 Software Standby Mode.................................................................................................... 509
21.5 Hardware Standby Mode .................................................................................................. 512
21.6 Module Stop Mode ........................................................................................................... 513
21.7
19.9.1 Hardware Protection ............................................................................................ 488
19.9.2 Software Protection ............................................................................................. 488
19.9.3 Error Protection ................................................................................................... 488
20.1.1 System Clock Control Register (SCKCR) ........................................................... 492
20.1.2 Low-Power Control Register (LPWRCR) ........................................................... 493
20.2.1 Connecting a Crystal Resonator .......................................................................... 494
20.2.2 External Clock Input............................................................................................ 495
20.6.1 Note on Crystal Resonator................................................................................... 498
20.6.2 Note on Board Design.......................................................................................... 498
21.1.1 Standby Control Register (SBYCR) .................................................................... 504
21.1.2 Module Stop Control Registers A to C (MSTPCRA to MSTPCRC) .................. 506
21.3.1 Transition to Sleep Mode..................................................................................... 508
21.3.2 Clearing Sleep Mode ........................................................................................... 508
21.4.1 Transition to Software Standby Mode ................................................................. 509
21.4.2 Clearing Software Standby Mode........................................................................ 509
21.4.3 Setting Oscillation Stabilization Time after Clearing Software Standby Mode... 510
21.4.4 Software Standby Mode Application Example.................................................... 511
21.5.1 Transition to Hardware Standby Mode................................................................ 512
21.5.2 Clearing Hardware Standby Mode ...................................................................... 512
21.5.3 Hardware Standby Mode Timings ....................................................................... 512
Clock Output Disabling Function .................................................................................. 514
...................................................................................... 501
.................................................................................. 491
Rev. 3.00 Oct 04, 2005 page xxv of xl

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