ST5092AD STMICROELECTRONICS [STMicroelectronics], ST5092AD Datasheet

no-image

ST5092AD

Manufacturer Part Number
ST5092AD
Description
2.7V SUPPLY 14-BIT LINEAR CODEC WITH HIGH-PERFORMANCE AUDIO FRONT-END
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST5092ADR
Manufacturer:
ST
0
Part Number:
ST5092ADTR
Manufacturer:
ST
0
FEATURES:
Complete CODEC and FILTER system including:
Phone Features:
General Features:
June 1997
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
DIGITAL TO ANALOG CONVERTERS.
AND DIGITAL TO ANALOG CONVERTERS
A-LAW OR -LAW.
PLIFIER INPUTS. GAIN PROGRAMMABLE:
20 dB PREAMP. (+MUTE), 0 . . 22.5 dB AM-
PLIFIER, 1.5 dB STEPS.
PROGRAMMABLE: 0 . . 30 dB, 2 dB STEPS.
PROGRAMMABLE: 0 . . 30 dB, 2 dB STEPS.
POWER ON
SWITCHING.
CIRCUIT. ATTENUATION PROGRAMMABLE:
16 dB RANGE, 1 dB STEP. ROUTING POSSI-
BLE TO BOTH OUTPUTS.
CLUDING DTMF TONES, SINEWAVE OR
SQUAREWAVE
ATION PROGRAMMABLE: 27dB RANGE,
3dB STEP. THREE FREQUENCY RANGES:
a) 3.9Hz . . . . 996Hz, 3.9Hz STEP
b) 7.8Hz . . . . 1992Hz, 7.8Hz STEP
c) 15.6Hz . . . . 3984Hz, 15.6Hz STEP
LATED BUZZER DRIVER OUTPUT.
TION (*) -40 C to 85 C.
TERFACE MICROWIRE COMPATIBLE.
14 BIT LINEAR ANALOG TO DIGITAL AND
8 BIT COMPANDED ANALOG TO DIGITAL
TRANSMIT AND RECEIVE BAND-PASS FILTERS
ACTIVE ANTIALIAS NOISE FILTER.
THREE SWITCHABLE MICROPHONE AM-
EARPIECE AUDIO OUTPUT. ATTENUATION
EXTERNAL AUDIO OUTPUT. ATTENUATION
TRANSIENT SUPRESSION SIGNAL DURING
INTERNAL
INTERNAL RING OR TONE GENERATOR IN-
PROGRAMMABLE PULSE WIDTH MODU-
SINGLE 2.7V to 3.6V SUPPLY
EXTENDED TEMPERATURE RANGE OPERA-
1.5 W STANDBY POWER (TYP. AT 3.0V).
15mW OPERATING POWER (TYP. AT 3.0V).
13mW OPERATING POWER (TYP. AT 2.7V).
CMOS COMPATIBLE DIGITAL INTERFACES.
PROGRAMMABLE PCM AND CONTROL IN-
PROGRAMMABLE
AND DURING AMPLIFIER
WITH HIGH-PERFORMANCE AUDIO FRONT-END
WAVEFORMS.
SIDETONE
ATTENU-
2.7V SUPPLY 14-BIT LINEAR CODEC
APPLICATIONS:
(*) Functionality guaranteed in the range – 40 C to +85 C;
GENERAL DESCRIPTION
ST5092 is a high performance low power combined
PCM CODEC/FILTER device tailored to implement
the audio front-end functions required by the next
generation low voltage/low power consumption
digital terminals.
ST5092 offers a number of programmable func-
tions accessed through a serial control channel that
easily interfaces to any classical microcontroller.
The PCM interface supports both non-delayed (nor-
mal and reverse) and delayed frame synchroniza-
tion modes.
ST5092 can be configurated either as a 14-bit lin-
ear or as an 8-bit companded PCM coder.
Additionally to the CODEC/FILTER function,
ST5092 includes a Tone/Ring/DTMF generator, a
sidetone generation, and a buzzer driver output.
ST5092 fulfills and exceeds D3/D4 and CCITT rec-
ommendations and ETSI requirements for digital
handset terminals.
Main applications include digital mobile phones, as
cellular and cordless phones, or any battery pow-
ered equipment that requires audio codecs operat-
ing at low single supply voltages
ST5092AD
ST5092ADTR
ST5092TQFP
ST5092TQFPTR
– 30 C to +85 C.
Timing and Electrical Specifications are guaranteed in the range
GSM DIGITAL CELLULAR TELEPHONES.
CT2 DIGITAL CORDLESS TELEPHONES.
DECT DIGITAL CORDLESS TELEPHONES.
BATTERY OPERATED AUDIO FRONT-ENDS
FOR DSPs.
TQFP44(10x10x1.4)
ORDERING NUMBERS:
SO28
SO28
TQFP44
TQFP44
Package
10x10x1.4
10x10x1.4
PRELIMINARY DATA
Dim.
ST5092
SO28
Tube
Tape&Reel
Tray 8x20
Tape&Reel
Cond.
1/29

Related parts for ST5092AD

ST5092AD Summary of contents

Page 1

... June 1997 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 2.7V SUPPLY 14-BIT LINEAR CODEC TQFP44(10x10x1.4) ORDERING NUMBERS: Package ST5092AD SO28 ST5092ADTR SO28 ST5092TQFP TQFP44 ST5092TQFPTR TQFP44 APPLICATIONS: GSM DIGITAL CELLULAR TELEPHONES. CT2 DIGITAL CORDLESS TELEPHONES. ...

Page 2

ST5092 PIN CONNECTIONS (Top view) N. MIC3 MIC3- CCA GNDA CCP N. MIC1 MIC1- Fr MIC2+ Fr+ SO28 MIC2- Lr- V ...

Page 3

PIN FUNCTIONS (SO28) Pin Name 1 N.C. Not Connected Positive power supply input for the analog section. CCA V and V must be directly connected together. CC CCA 3 V Positive power supply input for the power section. ...

Page 4

ST5092 PIN FUNCTIONS (TQFP44) Pin Name 1 N.C. Not Connected. 2 Receive analog earpiece amplifier complementary outputs. These outputs can drive directly earpiece Fr+ Fr– transductor. The signal at this output can be the summ of: - ...

Page 5

FUNCTIONAL DESCRIPTION I DEVICE OPERATION I .1 Power on initialization: When power is first applied, power on reset cir- cuitry initializes ST5092 and puts it into the power down state. Gain Control Registers for the various programmable gain amplifiers and ...

Page 6

ST5092 be set by writing to bits register CR6. At- tenuations in the range 0 to -30 dB relative to the maximum level step can be programmed. The input of this programmable amplifier ...

Page 7

Figure 1: Digital Interface Format (*) FORMAT 1 F5 (delayed timing) F6 MCLK FORMAT 2 F8 (delayed timing) F9 MCLK (*) Significant Only For Companded Code. propriate programmable register. CS- must return ...

Page 8

ST5092 II PROGRAMMABLE FUNCTIONS For both formats of Digital Interface, programma- ble functions are configured by writing to a num- ber of registers using a 2-byte write cycle. Most of these registers can also be read-back for Table 1: Programmable ...

Page 9

Table 2: Control Register CR0 Functions state ...

Page 10

ST5092 Table 4: Control Register CR2 Functions msb (1) Significant in companded mode only. Table 5: Control Registers CR3 Functions ...

Page 11

Table 7: Control Register CR5 Functions Transmit amplifier Sidetone amplifier ...

Page 12

ST5092 Table 10: Control Register CR8 Functions f17 f16 f15 f14 f13 f12 msb Table 11: Control Register CR9 Functions f27 f26 f25 f24 f23 f22 msb Table ...

Page 13

CONTROL REGISTER CR0 First byte of a READ or a WRITE instruction to Control Register CR0 is as shown in TABLE 1. Second byte is as shown in TABLE 2. Master Clock Frequency Selection A master clock must be provided ...

Page 14

ST5092 Transmit/Receive enabling/disabling Bit ’EN’ (2) enables or disables voice data trans- fer on D and D pins. When disabled, PCM data X R from DR is not decoded and PCM time-slots are high impedance Default value ...

Page 15

Tone/Ring amplifier gain selection Output level of Ring/Tone generator, before at- tenuation by programmable attenuator is 1.6 Vpk- pk when f1 generator is selected alone or summed with the f2 generator and 1.26 Vpk-pk when f2 generator is selected alone. ...

Page 16

ST5092 Table 12: Examples of Usual Frequency Selection (Standard frequency tone range) Description f1 value (decimal) Tone 250 Hz 32 Tone 330 Hz 42 Tone 425 Hz 54 Tone 440 Hz 56 Tone 800 Hz 102 Tone 1330 Hz 170 ...

Page 17

TIMING DIAGRAM Non Delayed Data Timing Mode (Normal) (*) Delayed Data Timing Mode (*) (*) In the case of companded code the timing is applied to 8 bits instead of 16 bits (see ST5080A data sheet) ST5092 ...

Page 18

ST5092 TIMING DIAGRAM (continued) Non Delayed Reverse Data Timing Mode (*) tHMFR 1 2 MCLK tSFMR tHMFR FS tDFD tDMDR (*) In the case of companded code the timing is applied to 8 bits ...

Page 19

ABSOLUTE MAXIMUM RATINGS Parameter V to GND CC Voltage at MIC (V 3.6V) CC Current at V and Current at any digital output Voltage at any digital input (V 3.6V); limited at + 50mA CC Storage temperature ...

Page 20

ST5092 SERIAL CONTROL PORT TIMING Symbol Parameter f Frequency of CCLK CCLK t Period of CCLK high WCH t Period of CCLK low WCL t Rise Time of CCLK RC t Fall Time of CCLK FC t Hold Time, CCLK ...

Page 21

ANALOG INTERFACES Symbol Parameter I Input Leakage MIC R Input Resistance MIC R Load Resistance (*) LVFr C Load Capacitance (*) LVFr R Output Resistance OVFr0 V Differential offset: OSVFr0 Voltage Fr+ Fr- R Load Resistance ...

Page 22

ST5092 TRANSMISSION CHARACTERISTICS (continued) AMPLITUDE RESPONSE (Maximum, Nominal, and Minimum Levels) Receive path - Absolute levels Parameter 0 dBM0 level 0 dBM0 level AMPLITUDE RESPONSE (Maximum, Nominal, and Minimum Levels) Receive path - Absolute levels at V ...

Page 23

AMPLITUDE RESPONSE Receive path Symbol Parameter G Receive Gain Absolute Accuracy RAE G Receive Gain Absolute Accuracy RAL G Receive Gain Variation with RAGE programmed gain G Receive Gain Variation with RAGL programmed gain G Receive Gain Variation with RAT ...

Page 24

ST5092 ENVELOPE DELAY DISTORTION WITH FREQUENCY Symbol Parameter DXA Tx Delay, Absolute DXR Tx Delay, Relative DRA Rx Delay, Absolute DRR Rx Delay, Relative NOISE Symbol Parameter NXP Tx Noise, P weighted (up to 35dB) NRP Rx Noise, A weighted ...

Page 25

DISTORTION Symbol Parameter S Signal to Total Distortion TDX (*) (up to 35dB gain) Typical values are measured with 30.5dB gain S Single Frequency Distortion DFx transmit S Signal to Total Distortion (VFr) TDRE (*) ( up to 20dB attenuation) ...

Page 26

ST5092 APPLICATIONS Application Note for Microphone Connections ST5092 Application Note for V and V Connections Fr Lr DYNAMIC RECEIVERS (32 ) VFr+ VFr- ST5092 ST5090 VLr+ VLr- R must be greater than 30 For higher capacitive transducers, lower R values ...

Page 27

TQFP44 (10 x 10) PACKAGE MECHANICAL DATA DIM. MIN. TYP 0.05 A2 1.35 1.40 B 0.30 0.37 C 0.09 D 12.00 D1 10.00 D3 8.00 e 0.80 E 12.00 E1 10.00 E3 8.00 L 0.45 0.60 L1 1.00 ...

Page 28

ST5092 SO28 PACKAGE AND MECHANICAL DATA DIM. MIN. TYP 0.1 b 0. 1.27 e3 16.51 F 7.4 L 0.4 S 28/29 mm MAX. MIN. 2.65 0.3 0.004 0.49 0.014 ...

Page 29

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its ...

Related keywords