LTC1407 LINER [Linear Technology], LTC1407 Datasheet - Page 15

• Manufacturer Part Number: LTC1407
• Description: Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling Simultaneous Sampling
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
POWER-DOWN MODES
Upon power-up, the LTC1407/LTC1407A are initialized to
the active state and is ready for conversion. The Nap and
Sleep mode waveforms show the power down modes for
the LTC1407/LTC1407A. The SCK and CONV inputs con-
trol the power down modes (see Timing Diagrams). Two
rising edges at CONV, without any intervening rising
edges at SCK, put the LTC1407/LTC1407A in Nap mode
and the power drain drops from 14mW to 6mW. The
internal reference remains powered in Nap mode. One or
more rising edges at SCK wake up the LTC1407/LTC1407A
for service very quickly and CONV can start an accurate
U
U
W
Figure 5. Recommended Layout
U
conversion within a clock cycle. Four rising edges at
CONV, without any intervening rising edges at SCK, put
the LTC1407/LTC1407A in Sleep mode and the power
drain drops from 14mW to 10 W. One or more rising
edges at SCK wake up the LTC1407/LTC1407A for opera-
tion. The internal reference (V
settle with a 10 F load. Using sleep mode more frequently
compromises the settled accuracy of the internal refer-
ence. Note that for slower conversion rates, the Nap and
Sleep modes can be used for substantial reductions in
power consumption.
LTC1407/LTC1407A
1407 F05
REF
) takes 2ms to slew and
15
1407f