LTC1629 LINER [Linear Technology], LTC1629 Datasheet - Page 8

• Manufacturer Part Number: LTC1629
• Description: PolyPhase, High Efficiency, Synchronous Step-Down Switching Regulators
• Manufacturer: LINER [Linear Technology]

LTC1629/LTC1629-PG
PI FU CTIO S
PLLIN (Pin 6): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with
50k . The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal.
PHASMD (Pin 7): Control Input to Phase Selector which
determines the phase relationships between controller 1,
controller 2 and the CLKOUT signal.
I
tor Compensation Point. Both current comparator’s thresh-
olds increase with this control voltage. The normal voltage
range of this pin is from 0V to 2.4V.
SGND (Pin 9): Signal Ground, common to both control-
lers, must be routed separately from the input switched
current ground path to the common (–) terminal(s) of the
C
V
provides true remote output voltage sensing. This pin
normally drives an external resistive divider that sets the
output voltage.
V
fier. Internal precision resistors capable of being elec-
tronically switched in or out can configure it as a differen-
tial amplifier or an uncommitted Op Amp.
AMPMD (Pin 15) (LTC1629 Only): This Logic Input pin
controls the connections of internal precision resistors
that configure the operational amplifier as a unity-gain
differential amplifier.
PGOOD (Pin 15) (LTC1629-PG Only): Open-Drain Logic
Output. PGOOD is pulled to ground when the voltage on
the EAIN pin is not within 7.5% of its set point.
TG2, TG1 (Pins 16, 27): High Current Gate Drives for Top
N-Channel MOSFETS. These are the outputs of floating
drivers with a voltage swing equal to INTV
posed on the switch node voltage SW.
8
TH
OUT
DIFFOUT
OS
U
(Pin 8): Error Amplifier Output and Switching Regula-
–
, V
capacitor(s).
OS
(Pin 10): Output of a Differential Amplifier that
+
U
(Pins 11, 12): Inputs to an Operational Ampli-
U
CC
superim-
SW2, SW1 (Pins 17, 26): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V
BOOST2, BOOST1 (Pins 18, 25): Bootstrapped Supplies
to the Topside Floating Drivers. Capacitors are connected
between the Boost and Switch pins and Schottky diodes
are tied between the Boost and INTV
at the Boost pins is from INTV
BG2, BG1 (Pins 19, 23): High Current Gate Drives for
Bottom Synchronous N-Channel MOSFETS. Voltage swing
at these pins is from ground to INTV
PGND (Pin 20): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETS and the (–) terminals of
C
INTV
Dropout Regulator and the EXTV
control circuits are powered from this voltage source.
Decouple to power ground with a 1 F ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7 F
additional tantalum or other low ESR capacitor.
EXTV
Switch . This switch closes and supplies INTV
ing the internal low dropout regulator whenever EXTV
higher than 4.7V. See EXTV
tions Information section. Do not exceed 7V on this pin
and ensure V
V
to the IC’s signal ground pin.
CLKOUT (Pin 28): Output Clock Signal available to
daisychain other controller ICs for additional MOSFET
driver stages/phases.
IN
IN
.
(Pin 24): Main Supply Pin. Should be closely decoupled
CC
CC
(Pin 21): Output of the Internal 5V Linear Low
(Pin 22): External Power Input to an Internal
EXTVCC
V
INTVCC
CC
.
Connection in the Applica-
CC
CC
to (V
Switch. The driver and
CC
CC
pins. Voltage swing
IN
.
+ INTV
CC,
CC
IN
bypass-
).
.
CC
is