LTC1771 LINER [Linear Technology], LTC1771 Datasheet - Page 7

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LTC1771

Manufacturer Part Number
LTC1771
Description
Low Quiescent Current High Efficiency Step-Down DC/DC Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
Power MOSFET Selection
An external P-channel power MOSFET must be selected
for use with the LTC1771. The main selection criteria for
the power MOSFET are the threshold voltage V
the “on” resistance R
and total gate charge.
Since the LTC1771 can operate down to input voltages as
low as 2.8V, a sublogic level threshold MOSFET (R
guaranteed at V
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC1771 is less than
the absolute maximum V
MOSFET gate will see the full supply voltage.
The required R
allowable power dissipation. For applications that may
operate the LTC1771 in dropout, i.e. 100% duty cycle, at
its worst case the required R
where P
temperature dependency of R
given for a MOSFET in the form of a normalized R
temperature curve, but = 0.005/ C can be used as an
approximation for low voltage MOSFETs.
In applications where the maximum duty cycle is less than
100% and the LTC1771 is in continuous mode, the R
is governed by:
where DC is the maximum operating duty cycle of the
LTC1771.
Catch Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the
R
R
DS ON
DS ON
(
(
P
DC
is the allowable power dissipation and
)
)
V
DC I
I
V
DS(ON)
GS
OUT MAX
OUT
IN
= 2.5V) is required for applications that
OUT
(
U
V
DS(ON)
P
V
of the MOSFET is governed by its
D
2
P
P
D
)
P
1
GS
U
2
, reverse transfer capacitance
1
rating (typically 12V), as the
DS(ON)
DS(ON)
P
P
W
is given by:
. (1 +
P
) is generally
U
GS(TH)
DS(ON)
P
DS(ON)
DS(ON)
is the
and
vs
diode conducts most of the time. As V
the diode conducts only a small fraction of the time. The
most stressful condition for the diode is when the output
is short-circuited. Under this condition, the diode must
safely handle I
To maximize both low and high current efficiencies, a fast
switching diode with low forward drop and low reverse
leakage should be used. Low reverse leakage current is
critical to maximize low current efficiency since the leak-
age can potentially exceed the magnitude of the LTC1771
supply current. Low forward drop is critical for high
current efficiency since loss is proportional to forward
drop. The effect of reverse leakage and forward drop on
no- load supply current and efficiency for various Schottky
diodes is shown in Table 1. As can be seen, these are
conflicting parameters and the user must weigh the
importance of each spec in choosing the best diode for the
application.
Table 1. Effect of Catch Diode on Performance
DIODE
MBR0540
UPS5817
MBR0520
MBRS120T3
MBRM120LT3
MBRS320
C
At higher load currents, when the inductor current is
continuous, the source current of the P-channel MOSFET
is a square wave of duty cycle V
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
capacitor current is given by:
This formula has a maximum at V
I
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
RMS
IN
C
and C
IN
= I
required I
OUT
OUT
/2. This simple worst-case condition is com-
(V
LEAKAGE
Selection
R
0.25 A
19.7 A
PEAK
2.8 A
3.7 A
4.4 A
8.3 A
= 3.3V) V
RMS
at close to 100% duty cycle.
F
0.50V
0.41V
0.36V
0.43V
0.32V
0.29V
I
@ 1A SUPPLY CURRENT
MAX OUT
V
OUT
NO-LOAD
10.4 A
11.8 A
12.2 A
12.2 A
14.0 A
20.0 A
/V
V
V
IN
IN
IN
IN
IN
. To prevent large
approaches V
= 2V
LTC1771
V
OUT
OUT
EFFICIENCY
AT 10V/1A
, where
86.3%
88.2%
88.4%
87.9%
89.4%
89.8%
1 2 /
7
OUT

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