LT1468-2_09 LINER [Linear Technology], LT1468-2_09 Datasheet - Page 8

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LT1468-2_09

Manufacturer Part Number
LT1468-2_09
Description
16-Bit DAC Current-to-Voltage Converter
Manufacturer
LINER [Linear Technology]
Datasheet
LT1468-2
APPLICATIONS INFORMATION
The LT1468-2 may be inserted directly into many operational
amplifi er applications improving both DC and AC perfor-
mance, provided that the nulling circuitry is removed. The
suggested nulling circuit for the LT1468-2 is shown below.
Gain of 2 Stable
The LT1468-2 is a decompensated version of the LT1468.
The precision DC performance is identical, but the internal
compensation capacitors have been reduced to a point
where the op amp needs a gain of 2 or greater in order
to be stable.
In general, for applications where the gain around the op
amp is ≥ 2, the decompensated version should be used,
because it will give the best AC performance. In applica-
tions where the gain is < 2, the unity-gain stable version
should be used.
The appropriate way to defi ne the ‘gain’ is as the inverse
of the feedback ratio from output to differential input,
including all relevant parasitics. Moreover, as with all
feedback loops, the stability of the loop depends on the
value of that feedback ratio at frequencies where the total
loop-gain would cross unity. Therefore, it is possible to
have circuits in which the gain at DC is lower than the gain
at high frequency, and these circuits can be stable even
with a non unity-gain stable op amp. An example is many
current-output DAC buffer applications.
Layout and Passive Components
The LT1468 requires attention to detail in board layout
in order to maximize DC and AC performance. For best
AC results (for example fast settling time) use a ground
plane, short lead lengths, and RF-quality bypass capacitors
(0.01μF to 0.1μF) in parallel with low ESR bypass capaci-
tors (1μF to 10μF tantalum). For best DC performance, use
“star” grounding techniques, equalize input trace lengths
8
3
2
+
LT1468-2
1
5
100k
V
V
+
7 6
4
Offset Nulling
0.1μF
0.1μF
14682 AI01
2.2μF
2.2μF
and minimize leakage (i.e., 1.5GΩ of leakage between an
input and a 15V supply will generate 10nA—equal to the
maximum I
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close
to that of the inputs. For inverting confi gurations tie the
ring to ground, in noninverting connections tie the ring
to the inverting input (note the input capacitance will
increase which may require a compensating capacitor as
discussed below.)
Microvolt level error voltages can also be generated in
the external circuitry. Thermocouple effects caused by
temperature gradients across dissimilar metals at the
contacts to the inputs can exceed the inherent drift of
the amplifi er. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Make no connection to Pin 8. This pin is used for factory
trim of the inverting input current.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with the
input capacitance to form a pole that can cause peaking or
even oscillations. A feedback capacitor of the value:
may be used to cancel the input pole and optimize dynamic
performance. For applications where the DC noise gain is
one, and a large feedback resistor is used, C
less than or equal to one half of C
be a DAC I-to-V converter as shown on the front page of
this data sheet where the DAC can have many tens of pF
of output capacitance.
C
F
= (R
G
)(C
B
R
G
specifi cation.)
IN
/R
Nulling Input Capacitance
C
F
V
IN
)
IN
+
LT1468-2
R
C
F
F
IN
. An example would
14682 AI02
V
OUT
F
should be
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