LTC1865L LINER [Linear Technology], LTC1865L Datasheet
LTC1865L
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LTC1865L Summary of contents
Page 1
... These 16-bit switched capacitor successive approximation ADCs include sample-and-holds. The LTC1864L has a differential analog input with an external reference pin. The LTC1865L offers a software- selectable 2-channel MUX and an external reference pin on the MSOP version. The 3-wire, serial I/O, small MSOP or SO-8 package and ...
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... LTC1864L/LTC1865L ABSOLUTE AXI U RATI GS Supply Voltage (V ) ................................................. 7V CC Ground Voltage Difference AGND, DGND LTC1865L MSOP Package ......... ±0.3V Analog Input ............... (GND – 0.3V Digital Input ................................ (GND – 0.3V Digital Output .............. (GND – 0.3V Power Dissipation .............................................. 400mW U PACKAGE/ORDER I FOR ATIO TOP VIEW ...
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... Input Differential Voltage – Range + Absolute Input Range IN Input – IN Input V Input Range LTC1864L SO-8 and MSOP, LTC1865L MSOP REF Analog Input Leakage Current (Note 4) C Input Capacitance In Sample Mode IN During Conversion ACCURACY T = 25° ...
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... SCK not have to be clocked during this time if the SDO data word is not desired. In the case of the LTC1865L a minimum of 2 clocks are required on the SCK input after CONV falls to configure the MUX during this time. denotes specifications which apply over the ...
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... TEMPERATURE (°C) 1864L/65L G05 Typical DNL Curve 2. 2.5V REF f = 150kHz –1 –2 0 32768 49152 65536 16384 CODE 1865 G03 LTC1864L/LTC1865L Sleep Current vs Temperature 150kHz 2. 2.5V REF –50 – 100 125 TEMPERATURE (°C) ...
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... LTC1864L/LTC1865L W U TYPICAL PERFOR A CE CHARACTERISTICS Change in Offset vs Reference Voltage 150kHz 25° 3. –5 –10 –15 – REFERENCE VOLTAGE (V) 1864L/65L G10 Change in Gain Error vs Temperature 2. 2.5V REF –1 –2 –3 –4 –5 – ...
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... CONV (Pin 5): Convert Input. A logic high on this input starts the A/D conversion process. If the CONV input is left high after the A/D conversion is finished, the part powers LTC1865L (MSOP Package) CONV (Pin 1): Convert Input. A logic high on this input starts the A/D conversion process. If the CONV input is left high after the A/D conversion is finished, the part powers down ...
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... LTC1864L/LTC1865L U U FUNCTIONAL BLOCK DIAGRA PIN NAMES IN PARENTHESES REFER TO LTC1865L + IN (CH0) – IN (CH1) GND TEST CIRCUITS Load Circuit for dDO r f TEST POINT 3k SDO 20pF Voltage Waveforms for t CONV SDO t en Voltage Waveforms for SDO Delay Times, t SCK dDO ...
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... COMPLETING THE DATA TRANSFER, IF FURTHER SCK CLOCKS ARE APPLIED WITH CONV LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY Figure 1. LTC1864L Operating Sequence – – 1864 F02 LTC1864L/LTC1865L + minus IN is tied rail-to-rail input span REF CC + ” as shown in Figure 3. t SMPL ...
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... Reference Input The reference input of the LTC1865L SO-8 package is internally tied to V therefore equal the LTC1865L MSOP package defines the span of the A/D converter. The LTC1865L MSOP package can operate with reference voltages from SINGLE-ENDED MUX MODE DIFFERENTIAL ...
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... To achieve the optimum performance, use a printed circuit board. The ground pins (AGND and DGND for the LTC1865L MSOP package and GND for the LTC1864L and LTC1865L SO-8 package) should be tied directly to the analog ground plane with minimum lead length ...
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... LTC1864L/LTC1865L U U APPLICATIO S I FOR ATIO sn18645L 18645Lfs ...
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... Component Side Silk Screen for LTC1864L Evaluation Circuit Component Side Showing Traces (Note Wider Traces on Analog Side) Ground Layer with Separate Analog and Digital Grounds W U (Note Almost No Analog Traces on Board Bottom) Supply Layer with 5V Digital Supply and Analog Ground Repeated LTC1864L/LTC1865L Bottom Side Showing Traces sn18645L 18645Lfs 13 ...
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... LTC1864L/LTC1865L PACKAGE DESCRIPTIO 5.23 (.206) MIN 0.42 ± 0.04 (.0165 ± .0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) GAUGE PLANE 0.18 (.077) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006" ...
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... TYP 0.53 ± 0.01 (.021 ± .006) 1.10 (.043) DETAIL “A” MAX SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP LTC1864L/LTC1865L .189 – .197 NOTE .150 – .157 (3.810 – 3.988) NOTE .004 – .010 (0.101 – 0.254) ...
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... GND CONV GAIN CONTROL POWER DISSIPATION DESCRIPTION 1.22mW Pin Compatible with LTC1864L/LTC1865L 4.25mW Pin Compatible with LTC1864/LTC1865 20mW 16-Pin SSOP, Unipolar or Bipolar, Reference ±5V 15mW Serial/Parallel I/O, Internal Reference ±5V 65mW Configurable Bipolar or Unipolar Input Ranges, 5V 4.25mW MSOP, SO-8, 1- and 2-Channel, 5V Supply Bandgap, 130µ ...