LT1490A LINER [Linear Technology], LT1490A Datasheet - Page 8

• Manufacturer Part Number: LT1490A
• Description: Dual Over-The-Top Micropower Rail-to-Rail Input and Output Op Amp
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LT1490A
Supply Voltage
The positive supply pin of the LT1490A should be by-
passed with a small capacitor (about 0.01 F) within an
inch of the pin. When driving heavy loads an additional
4.7 F electrolytic capacitor should be used. When using
split supplies, the same is true for the negative supply pin.
The LT1490A is protected against reverse battery voltages
up to 18V. In the event a reverse battery condition occurs,
the supply current is less than 1nA.
The LT1490A can be shut down by removing V
condition the input bias current is typically less than 0.5nA,
even if the inputs are 44V above the negative supply.
When operating the LT1490A on total supplies of 20V or
more, the supply must not rise to its final voltage in less
than 1 s. This is especially true if low ESR bypass capaci-
tors are used. A series RLC circuit is formed from the
supply lead inductance and the bypass capacitor. A resis-
tance of 7.5 in the supply or in the bypass capacitor will
dampen the tuned circuit enough to limit the rise time.
Inputs
The LT1490A has two input stages, NPN and PNP (see the
Simplified Schematic), resulting in three distinct operat-
ing regions as shown in the Input Bias Current vs Common
Mode typical performance curve.
For input voltages about 0.8V or more below V
input stage is active and the input bias current is typically
– 1nA. When the input voltage is about 0.5V or less from
V
current is typically 25nA. Increases in temperature will
cause the voltage at which operation switches from the
PNP stage to the NPN stage to move towards V
offset voltage of the NPN stage is untrimmed and is
typically 600 V.
A Schottky diode in the collector of each NPN transistor of
the NPN input stage allows the LT1490A to operate with
either or both of its inputs above V
V
bias current is typically 3 A at room temperature. The
input offset voltage is typically 700 V when operating
above V
above V
8
+
+
, the NPN input stage is operating and the input bias
the NPN input transistor is fully saturated and the input
+
–
. The LT1490A will operate with its inputs 44V
regardless of V
U
+
U
.
+
W
. At about 0.3V above
+
U
+
. The input
, the PNP
+
. In this
The inputs are protected against excursions as much as
15V below V
each input and a diode from the input to the negative
supply. There is no output phase reversal for inputs up to
15V below V
inputs and the maximum differential input voltage is 44V.
Output
The output voltage swing of the LT1490A is affected by
input overdrive as shown in the typical performance
curves.
The output of the LT1490A can be pulled up to 18V beyond
V
is less than 0.5V.
The normally reverse-biased substrate diode from the
output to V
output is forced below V
limited to 100mA, no damage will occur.
The LT1490A is internally compensated to drive at least
200pF of capacitance under any output loading condi-
tions. A 0.22 F capacitor in series with a 150 resistor
between the output and ground will compensate these
amplifiers for larger capacitive loads, up to 10,000pF, at all
output currents.
Distortion
There are two main contributors of distortion in op amps:
output crossover distortion as the output transitions
from sourcing to sinking current and distortion caused
by nonlinear common mode rejection. Of course, if the op
amp is operating inverting there is no common mode
induced distortion. When the LT1490A switches be-
tween input stages there is significant nonlinearity in the
CMRR. Lower load resistance increases the output cross-
over distortion, but has no effect on the input stage
transition distortion. For lowest distortion the LT1490A
should be operated single supply, with the output always
sourcing current and with the input voltage swing be-
tween ground and (V
mance Characteristics curves.
+
with less than 1nA of leakage current, provided that V
–
will cause unlimited currents to flow when the
–
–
. There are no clamping diodes between the
by an internal 1k resistor in series with
+
– 0.8V). See the Typical Perfor-
–
. If the current is transient and
+