LTC1871-1 LINER [Linear Technology], LTC1871-1 Datasheet - Page 23

• Manufacturer Part Number: LTC1871-1
• Description: High Effi ciency, Synchronous, 4-Switch Buck-Boost Controller
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
Double-check the T
temperature:
The maximum power dissipation of switch B occurs in
buck mode. Assuming a junction temperature of T
with ρ
Double-check the T
temperature:
The maximum power dissipation of switch C occurs in boost
mode. Assuming a junction temperature of T
ρ
Double-check the T
temperature:
The maximum power dissipation of switch D occurs
in boost mode when its duty cycle is higher than 50%.
Assuming a junction temperature of T
ρ
Double-check the T
temperature:
110°C
100°C
T
T
T
P
T
P
P
J
J
J
D BOOST
J
B,BUCK
C,BOOST
,
= 70°C + 1.94W • 40°C/W = 147.6°C
= 70°C + 0.09W • 40°C/W = 73.6°C
= 70°C + 1.08W • 40°C/W = 113°C
= 70°C + 0.73W • 40°C/W = 99°C
80°C
= 1.4, the power dissipation at V
= 1.35, the power dissipation at V
= 1.2, the power dissipation at V
=
=
=
18 – 12
12
+ 2 •12
(
5
12 – 5
18
⎛
⎝ ⎜
5
J
12
J
2
J
J
5
• 5
)
in the MOSFET with 70°C ambient
3
in the MOSFET at 70°C ambient
in the MOSFET at 70°C ambient
in the MOSFET at 70°C ambient
•12
•
2
5
5
5
•1.2 • 0.009 = 90mW
⎞
⎠ ⎟
•150p • 400k = 1.27W
• 5
2
2
1 35 0 009 0 73
•1.4 • 0.009
IN
J
= 5V is:
IN
= 100°C with
J
=
IN
= 110°C with
= 5V is:
= 18V is:
J
= 80°C
W
C
this mode, the maximum input current peak is:
A low ESR (10mΩ) capacitor is selected. Input voltage
ripple is 57mV (assuming ESR dominate ripple).
C
In this mode, the maximum output current peak is:
A low ESR (5mΩ) capacitor is suggested. This capacitor
will limit output voltage ripple to 53mV (assuming ESR
dominate ripple).
PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
• The ground plane layer should not have any traces and
• Place C
IN
OUT
I
I
it should be as close as possible to the layer with power
MOSFETs.
pact area. Place C
one compact area. One layout example is shown in
Figure 10.
IN PEAK MAX BUCK
OUT PEAK MAX BOOST
is chosen to fi lter the square current in buck mode. In
V
,
IN
is chosen to fi lter the square current in boost mode.
C
IN
,
(
IN
QA
(
, switch A, switch B and D1 in one com-
,
Figure 10. Switches Layout
,
D1
)
=
OUT
SW2
QB
)
5
=
LTC3780
, switch C, switch D and D2 in
R
⎛
⎝ ⎜
SENSE
CKT
12
5
L
1
+
SW1
QC
5
29
2
%
⎛
⎝ ⎜
1
⎞
⎠ ⎟
+
=
11
LTC3780
5 7
2
.
%
D2
QD
A
⎞
⎠ ⎟
=
10 6 6 A
C
V
GND
OUT
OUT
3780 F10
23
.
3780fe