LTC1923 LINER [Linear Technology], LTC1923 Datasheet - Page 9

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LTC1923

Manufacturer Part Number
LTC1923
Description
High Efficiency Thermoelectric Cooler Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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PI FU CTIO S
V
amplifier equal to the magnitude of the voltage across
the TEC.
TEC
Voltage Amplifier. This amplifier has a fixed gain of 1 with its
output being the voltage across the TEC with respect to
AGND. This input, along with TEC
TEC is heating or cooling the laser as indicated by the
H/C pin.
TEC
tial TEC Voltage Amplifier.
I
Sense Amplifier. The voltage on this pin is equal to 10 •
(I
cooler current, I
is the sense resistor used to sense this current. This
voltage represents only the magnitude of the current and
provides no direction information. Current limit occurs
when the voltage on this pin exceeds the lesser of 1.5
times the voltage on SS, 1.5 times the voltage on I
1.5V. When this condition is present, the pair of outputs,
which are presently conducting, are immediately turned
off. The current limit condition is cleared when the C
reaches the next corresponding peak or valley (see Cur-
rent Limit section).
CS
Current Sense Amplifier.
CS
Current Sense Amplifier. The amplifier has a fixed gain
of 10.
PDRVA, PDRVB (Pins 20, 25/Pins 18, 24): These push-
pull outputs are configured to drive the opposite high side
PMOS switches in a full-bridge arrangement.
TEC
TEC
TEC
U
+
+
(Pin 19/Pin 17): Noninverting Input of the Differential
(Pin 17/Pin 15): Output of the Differential Current
(Pin 14/Pin 12): Output of the differential TEC voltage
(Pin 18/Pin 16): Inverting Input to the Differential
(Pin 15/Pin 13): Inverting Input to the Differential TEC
(Pin 16/Pin 14): Noninverting Input to the Differen-
+ I
RIPPLE
U
) • R
RIPPLE
U
S
, where I
is the inductor ripple current and R
(GN Package/UH Package)
TEC
+
, signifies whether the
is the thermoelectric
LIM
T
pin
or
S
NDRVA, NDRVB (Pins 21, 24/Pins 19, 23): These push-
pull outputs are configured to drive the opposite low side
switches in a full-bridge arrangement.
PGND (Pin 22/Pin 20): This is the high current ground for
the IC. The external current sense resistor should be
referenced to this point.
V
Bypass this pin to PGND and AGND with > 10 F low ESL,
ESR ceramic capacitors. The turn on voltage level for V
is 2.6V with 130mV of hysteresis.
V
This pin should be bypassed to GND with a 1 F ceramic
capacitor. The reference is able to supply a minimum of
10mA of current and is internally short-circuit current
limited.
C
capacitor pin is used in conjunction with R
oscillator frequency. The equation for calculating fre-
quency is:
R
the charging and discharging currents for the triangle
oscillator. This pin also sets the dead time between turning
one set of outputs off and turning the other set on to ensure
the outputs do not cross conduct. The voltage on this pin
is regulated to 0.5V. For best performance, the current
sourced from the R
150 A. Selecting R
provides 90ns of dead time.
DD
REF
T
T
(Pin 28/Pin 29): A single resistor from R
(Pin 27/Pin 28): The triangular wave oscillator timing
f
OSC
(Pin 23/Pins 21, 22): Positive Supply Rail for the IC.
(Pin 26/Pin 27): This is the output of the Reference.
R
0 75
T
.
C
T
Hz
T
T
pin should be limited to a maximum
to be 10k is recommended and
LTC1923
T
to AGND sets
T
to set the
9
1923f
DD

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