TFA9812HN PHILIPS [NXP Semiconductors], TFA9812HN Datasheet - Page 29

• Manufacturer Part Number: TFA9812HN
• Description: BTL stereo Class-D audio amplifier with I2S input
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
Table 26.
TFA9812_2
Preliminary data sheet
Start TFA9812
S
address
11010A
I
2
C read cycle
2
A
1
9.5 Top-level register map
R/!W
0
10. The microcontroller asserts an acknowledge.
11. The TFA9812 sends the second byte.
12. The microcontroller asserts either an acknowledge or a negative acknowledge (NA).
Table 27
control or status areas at top level. There are 47 control registers and 2 status registers.
The following subsections give the individual register interpretations and bit level details.
Table 27.
Register
address
(hex)
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
9. The TFA9812 sends the first byte. This is the most significant byte of the register.
A
– If the microcontroller has asserted an acknowledge, the targeted register address
– If the microcontroller has asserted a negative acknowledge, the TFA9812 frees the
First
register
address
ADDR
is auto-increased by the TFA9812 and steps 9 to 12 are repeated.
I
2
C bus and the microcontroller generates a stop condition (P).
describes the assignments of the various register addresses to the functional
Default (hex)
0x0020;
Legacy_mode
0x0021; I
0x0000
0x0006
0x0002
0x0058
0x4F40
0x0058
0x4F40
0x0A63
0x4240
0x0A63
0x4240
0x00B7
0x4E40
0x00B7
0x4E40
0x14A2
Top-level register map
A
Sr
2
C_mode
Rev. 02 — 22 January 2009
TFA9812
address
11010A
Access See:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
A
1
R/!W
1
BTL stereo Class-D audio amplifier with I
Section 9.5.1
Section 9.5.2
Section 9.5.3
Section 9.5.4
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
Section 9.5.5
A
MS
data
byte
MS1 A
Description
Interpolator settings and soft mute
Volume control
Format digital in
Equalizer configuration
Equalizer_A1 word_1; word_1 for
equalizer band A1, see
Equalizer_A1 word_2; see
Section 8.5.1.2
Equalizer_B1 word_1
Equalizer_B1 word_2
Equalizer_C1 word_1
Equalizer_C1 word_2
Equalizer_D1 word_1
Equalizer_D1 word_2
Equalizer_A2 word_1
Equalizer_A2 word_2
Equalizer_B2 word_1
Equalizer_B2 word_2
Equalizer_C2 word_1
LS
data
byte
LS1 <A>
More
data...
More
data...
<....>
© NXP B.V. 2009. All rights reserved.
TFA9812
Section 8.5.1.2
NA
2
S input
29 of 66
Stop
P