LTC3532 LINER [Linear Technology], LTC3532 Datasheet - Page 12

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LTC3532

Manufacturer Part Number
LTC3532
Description
Micropower Synchronous Buck-Boost DC/DC Converter
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
LTC3532
Table 2. Capacitor Vendor Information
Input Capacitor Selection
Since V
input to the power stage of the converter, it is recommended
to place at least a 4.7μF , low ESR ceramic bypass capaci-
tor close to the V
minimize any stray resistance from the converter to the
battery or other power source.
Optional Schottky Diodes
The Schottky diodes across the synchronous switches
B and D are not required (V
lower drop during the break-before-make time (typically
15ns) improving effi ciency. Use a surface mount Schottky
diode such as an MBRM120T3 or equivalent. Do not use
ordinary rectifi er diodes, since the slow recovery times
will compromise effi ciency. For applications with an
output voltage above 4.3V, a Schottky diode is required
from SW2 to V
Output Voltage > 4.3V
A Schottky diode from SW2 to V
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2Ω/1nF series snubber is required between SW1 and
GND. A Schottky diode from SW1 to V
added as close to the pins as possible. For the higher input
voltages, V
a ceramic bypass capacitor as close to the V
pins as possible is also required.
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IN
is the supply voltage for the IC, as well as the
IN
bypassing becomes more critical; therefore,
OUT
IN
.
U
and GND pins. It is also important to
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U
OUT
OUT
< 4.3V), but provide a
W
is required for output
IN
should also be
IN
and SGND
U
Operating Frequency Selection
Higher operating frequencies allow the use of a smaller
inductor and smaller input and output fi lter capacitors,
thus reducing board area and component height. How-
ever, higher operating frequencies also increase the IC’s
total quiescent current due to the gate charge of the four
switches, as given by:
Buck: I
Boost: I
Buck/Boost: I
where f = switching frequency in MHz. Therefore frequency
selection is a compromise between the optimal effi ciency
and the smallest solution size.
Closing the Feedback Loop
The LTC3532 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck/boost), but is usually no greater than
15. The output fi lter exhibits a double pole response, as
given by:
where L is in henrys and C
The output fi lter zero is given by:
where R
output capacitor.
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
(in buck mode)
(in boost mode)
f
f
f
f
FILTER
FILTER
FILTER
RHPZ
Q
Q
ESR
= (0.125 • V
=
= [0.06 • (V
2 • π • I
POLE
POLE
ZERO
Q
is the equivalent series resistance of the
= [f • (0.19 • V
=
=
=
OUT
2 • π • L • C
2 • V
2 • π • R
V
IN
IN
IN
• f) mA
2
• L • V
+ V
OUT
OUT
OUT
1
ESR
• π • L • C
1
OUT
IN
) • f] mA
V
is in farads.
IN
+ 0.06 • V
• C
OUT
Hz
OUT
Hz
OUT
Hz
OUT
Hz
)] mA
3532fc

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