AD7225 Analog Devices, AD7225 Datasheet - Page 2

• Manufacturer Part Number: AD7225
• Description: LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
• Manufacturer: Analog Devices

DUAL SUPPLY
Parameter
STATIC PERFORMANCE
REFERENCE INPUT
DIGITAL INPUTS
DYNAMIC PERFORMANCE
POWER SUPPLIES
SWITCHING CHARACTERISTICS
NOTES
1
2
3
4
Specifications subject to change without notice.
AD7225–SPECIFICATIONS
Maximum possible reference voltage.
Temperature ranges are as follows:
Sample Tested at 25 C to ensure compliance.
Switching characteristics apply for single and dual supply operation.
K, L Versions: –40 C to +85 C
B, C Versions: –40 C to +85 C
T, U Versions: –55 C to +125 C
Resolution
Total Unadjusted Error
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Full-Scale Temp. Coeff.
Zero Code Error @ 25 C
Zero Code Error Temp Coeff.
Voltage Range
Input Resistance
Input Capacitance
Channel-to-Channel Isolation
AC Feedthrough
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current
Input Capacitance
Input Coding
Voltage Output Slew Rate
Voltage Output Settling Time
Digital Feedthrough
Digital Crosstalk
Minimum Load Resistance
V
I
I
t
t
t
t
t
t
1
2
3
4
5
6
DD
SS
DD
T
Positive Full-Scale Change
Negative Full-Scale Change
@ 25 C
T
@ 25 C
T
@ 25 C
T
@ 25 C
T
@ 25 C
T
@ 25 C
T
MIN
MIN
MIN
MIN
MIN
MIN
MIN
Range
to T
to T
to T
to T
to T
to T
to T
MAX
MAX
MAX
MAX
MAX
MAX
MAX
3
3
3
3
3
INL
INH
3
(V
All specifications T
DD
3
3
= 11.4 V to 16.5 V, V
K, B
Versions
8
2 to (V
11
100
60
–70
2.4
0.8
8
Binary
2.5
5
5
50
50
2
11.4/16.5
10
9
95
120
0
0
0
0
70
90
10
10
95
120
2
1
1
1
5
25
30
30
1
3, 4
DD
2
– 4) 2 to (V
MIN
L, C
Versions
8
11
100
60
–70
2.4
0.8
8
Binary
2.5
5
5
50
50
2
11.4/16.5
10
9
95
120
0
0
0
0
70
90
10
10
95
120
1
1/2
1
1/2
5
15
20
30
1
to T
SS
DD
MAX
= –5 V
2
– 4) 2 to (V
unless otherwise noted.)
T Version
8
11
100
60
–70
2.4
0.8
8
Binary
2.5
5
5
50
50
2
11.4/16.5
12
10
95
150
0
0
0
0
70
90
10
10
95
150
2
1
1
1
5
25
30
30
1
10%; AGND = DGND = O V; V
DD
– 4)
–2–
U Version
8
2 to (V
11
100
60
–70
2.4
0.8
8
2.5
5
5
50
50
2
11.4/16.5
12
10
95
150
0
0
0
0
70
90
10
10
95
150
Binary
1
1/2
1
1/2
5
15
20
30
1
DD
– 4)
pF max
dB min
nV secs typ
nV secs typ
mA max
ns min
ns min
Units
Bits
LSB max
LSB max
LSB max
LSB max
ppm/ C typ
mV max
mV max
V min to V max
k min
dB max
V min
V max
pF max
V/ s min
k min
V min to V max For Specified Performance
mA max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
V/ C typ
A max
s max
s max
REF
= +2 V to (V
Conditions/Comments
V
Guaranteed Monotonic
V
Occurs when each DAC is loaded with all 1s.
V
V
V
V
V
Code transition all 0s to all 1s.
Code transition all 0s to all 1s.
V
Outputs Unloaded; V
Outputs Unloaded; V
Write Pulse Width
Address to Write Setup Time
Address to Write Hold Time
Data Valid to Write Setup Time
Data Valid to Write Hold Time
Load DAC Pulse Width
DD
DD
REF
REF
IN
REF
REF
OUT
DD
= 0 V or V
= +15 V
= 14 V to 16.5 V, V
= 10 V p-p Sine Wave @ 10 kHz
= 10 V p-p Sine Wave @ 10 kHz
= +10 V; Settling Time to 1/2 LSB
= +10 V; Settling Time to 1/2 LSB
= +10 V
– 4 V)
1
DD
unless otherwise noted.
5%, V
IN
IN
REF
= V
= V
REF
= +10 V
INL
INL
= +10 V
or V
or V
INH
INH
REV. B