AD745AN Analog Devices, AD745AN Datasheet - Page 11

• Manufacturer Part Number: AD745AN
• Description: Ultralow Noise/ High Speed/ BiFET Op Amp
• Manufacturer: Analog Devices

Design Considerations for I-to-V Converters
There are some simple rules of thumb when designing an I-V
converter where there is significant source capacitance (as with a
photodiode) and bandwidth needs to be optimized. Consider the
circuit of Figure 37. The high frequency noise gain (1 + C
is usually greater than five, so the AD745, with its higher slew
rate and bandwidth is ideally suited to this application.
Here both the low current and low voltage noise of the AD745
can be taken advantage of, since it is desirable in some instances
to have a large R
noise) and, at the same time, operate the amplifier at high noise
gain.
In this circuit, the R
bandwidth over which flat response can be obtained, in fact:
where:
With C
provide a two pole system with optimal flatness that has a corner
frequency of f
circuit’s response. Note that bandwidth and sensitivity are
directly traded off against each other via the selection of R
example, a photodiode with C
have a maximum bandwidth of 360 kHz when capacitor
C
required, then the maximum value of R
that of capacitor C
In either case, the AD745 provides impedance transformation,
the effective transresistance, i.e., the I/V conversion gain, may be
augmented with further gain. A wideband low noise amplifier
such as the AD829 is recommended in this application.
This principle can also be used to apply the AD745 in a high
performance audio application. Figure 38 shows that an I-V
converter of a high performance DAC, here the AD1862, can be
designed to take advantage of the low voltage noise of the
AD745 (2.9 nV/ Hz) as well as the high slew rate and
bandwidth provided by decompensation. This circuit, with
component values shown, has a 12 dB/octave rolloff at 728 kHz,
with a passband ripple of less than 0.001 dB and a phase
deviation of less than 2 degrees @ 20 kHz.
REV. C
L
f
f
B
C
= signal bandwidth
= gain bandwidth product of the amplifier
4.5 pF. Conversely, if only a 100 kHz bandwidth were
L
Figure 37. A Model for an l-to-V Converter
INPUT SOURCE: PHOTO DIODE,
ACCELEROMETER, ECT.
1/(2 R
f
I
B
S
B
. Capacitor C
F
(which increases sensitivity to input current
L
F
2 R
F
still
C
C
S
R
f
) the net response can be adjusted to a
S
C
B
F
time constant limits the practical
C
4.5 pF.
S
L
C
adjusts the damping of the
S
S
= 300 pF and R
F
R
AD745
would be 360 k and
F
C
L
F
= 100 k will
F
S
. For
/C
L
)
–11–
An important feature of this circuit is that high frequency
energy, such as clock feedthrough, is shunted to common via a
high quality capacitor and not the output stage of the amplifier,
greatly reducing the error signal at the input of the amplifier and
subsequent opportunities for intermodulation distortions.
Figure 39. RTI Noise Voltage vs. Input Capacitance
BALANCING SOURCE IMPEDANCES
As mentioned previously, it is good practice to balance the
source impedances (both resistive and reactive) as seen by the
inputs of the AD745. Balancing the resistive components will
optimize dc performance over temperature because balancing
will mitigate the effects of any bias current errors. Balancing
input capacitance will minimize ac response errors due to the
amplifier’s input capacitance and, as shown in Figure 39, noise
performance will be optimized. Figure 40 shows the required
external components for noninverting (A) and inverting (B)
configurations.
–12V
+12V
DIGITAL
INPUTS
–12V
0.01
0.01
F
F
Figure 38. A High Performance Audio DAC Circuit
0.01 F
1
4
5
2
3
6
7
8
20
10
40
30
0
10
CONVERTER
BALANCED
2.9nV/ Hz
20 BIT D/A
TOP VIEW
AD1862
3k
INPUT CAPACITANCE – pF
COMMON
DIGITAL
UNBALANCED
+12V
16
15
14
13
12
11
10
9
100
0.01 F
10 F
+
1 F
ANALOG
COMMON
+
–12V
2000pF
AD745
+12V
0.1 F
1000
100pF
0.1 F
AD745
3 POLE
FILTER
PASS
OUTPUT
LOW