AD7701AQ Analog Devices, AD7701AQ Datasheet - Page 14

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AD7701AQ

Manufacturer Part Number
AD7701AQ
Description
LC2MOS 16-Bit A/D Converter
Manufacturer
Analog Devices
Datasheet
SYNCHRONOUS EXTERNAL CLOCK MODE (SEC)
The SEC mode (MODE pin grounded) is designed for direct
interface to the synchronous serial ports of industry-standard
microprocessors such as the COPS series, 68HC11 and
68HC05. The SEC mode also allows customized interfaces,
using I/O port pins, to microprocessors that do not have a direct
fit with the AD7701’s other modes.
As shown in Figure 20, a falling edge on CS enables the serial
data output with the MSB initially valid. Subsequent data bits
change on the falling edge of an externally supplied SCLK.
After the LSB has been transmitted, DRDY goes high and
SDATA goes three-state. If CS is low and the AD7701 is still
transmitting data when a new data word becomes available, the
old data word continues to be transmitted and the new data is
lost.
AD7701
SDATA (O)
SDATA (O)
DRDY (O)
DRDY (O)
SCLK (O)
CLKIN (I)
SCLK (I)
CS (I)
CS (I)
Figure 19. SSC Mode Showing Data Timing Relative to SCLK
HI-Z
HI-Z
HI-Z
72 CLKIN
CYCLES
Figure 20. Timing Diagram for the SEC Mode
DB15 (MSB)
(MSB)
DB15
DB14
DB14
–14–
DB13
If CS is taken high at any time during data transmission,
SDATA and SCLK will go three-state immediately. If CS re-
turns low, the AD7701 will continue transmission with the same
data bit. If transmission has not been initiated and completed by
the time the next data word becomes available, and if CS is
high, DRDY will return high for four clock cycles, then fall as
the new word is loaded into the output register.
DB2
DB1
DB1
(LSB)
DB0 (LSB)
DB0
HI-Z
HI-Z
HI-Z
REV. D

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